<feed xmlns='http://www.w3.org/2005/Atom'>
<title>rt-thread.git/components/drivers/pci, branch v5.2.2-beta</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/components/drivers/pci?h=v5.2.2-beta</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/components/drivers/pci?h=v5.2.2-beta'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/'/>
<updated>2025-08-25T03:12:02Z</updated>
<entry>
<title>[DM/PCI] Add SoC PCI Kconfig import</title>
<updated>2025-08-25T03:12:02Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2025-08-20T08:39:15Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=af2c8ae1745f2231f04f94b65d4c41bee6b393c7'/>
<id>urn:sha1:af2c8ae1745f2231f04f94b65d4c41bee6b393c7</id>
<content type='text'>
Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>[DM/PCI] Fixup the DWC PCI resource release</title>
<updated>2025-08-25T03:12:02Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2025-08-20T08:38:24Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=7d96990effb625e3ee1b7e6766495e4e8abbb9fc'/>
<id>urn:sha1:7d96990effb625e3ee1b7e6766495e4e8abbb9fc</id>
<content type='text'>
Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>[DM/PCI] Fixup the bus-range probe</title>
<updated>2025-08-25T03:12:02Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2025-08-20T08:37:16Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=77e845e018a83a757f67ee0a05b090fef7aebcac'/>
<id>urn:sha1:77e845e018a83a757f67ee0a05b090fef7aebcac</id>
<content type='text'>
Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>[DM/PCI] Fixup the MSI info shuold free</title>
<updated>2025-08-25T03:12:02Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2025-08-20T08:36:12Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=8731289055d30468f09d4106376963b9d9912e36'/>
<id>urn:sha1:8731289055d30468f09d4106376963b9d9912e36</id>
<content type='text'>
Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>[DM/PCI] Add /proc access in RT-Smart user.</title>
<updated>2025-05-23T05:22:25Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2025-04-17T06:32:07Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=99fc1bb72b81b8da744ef8eb89d6a9e1d28716ce'/>
<id>urn:sha1:99fc1bb72b81b8da744ef8eb89d6a9e1d28716ce</id>
<content type='text'>
1. Add ROM base info.
2. Save th PM status.

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>[DM] Replace spinlock static init by RT_DEFINE_SPINLOCK</title>
<updated>2025-02-11T06:58:18Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2025-02-10T06:19:30Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=f50607628192b7ad1828e811bba238993b9afd55'/>
<id>urn:sha1:f50607628192b7ad1828e811bba238993b9afd55</id>
<content type='text'>
Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>[DM/FIXUP] Fixup PCI build</title>
<updated>2024-12-13T02:39:20Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2024-12-11T11:28:20Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=d248a3a2887dc4ec56c5d9cf8ffa535665f42eeb'/>
<id>urn:sha1:d248a3a2887dc4ec56c5d9cf8ffa535665f42eeb</id>
<content type='text'>
1. Add PCI include in rtdevice.h
2. Fixup `RT_KEY_ENABLED` loss.
3. remove waring type of `dw_pcie_ep_get_func_from_ep` return.

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>[DM/PCI] Add DesignWare PCIe RC/EP base drivers</title>
<updated>2024-11-28T01:46:58Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2024-11-27T03:29:48Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=88b8310d163c192ae2cfed4ca4b6260a027a889a'/>
<id>urn:sha1:88b8310d163c192ae2cfed4ca4b6260a027a889a</id>
<content type='text'>
Too many PCI controllers base on DesignWare PCIe.
This is a modules.

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>[DM/PCI] Add memory window pool for EP</title>
<updated>2024-11-28T01:46:58Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2024-11-27T09:13:27Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=50982cd970fc5b70830be0cb7c71b1bc50fca5b0'/>
<id>urn:sha1:50982cd970fc5b70830be0cb7c71b1bc50fca5b0</id>
<content type='text'>
Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>[DM/FIXUP] Add ms sleep for link status change</title>
<updated>2024-11-26T03:14:51Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2024-11-25T12:42:08Z</published>
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<id>urn:sha1:71520fa9f1b769fa838e39ea5f00175424154376</id>
<content type='text'>
We should wait a while for success or failure
after link status change or will communicate
fail with the endpoint.

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
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