rt-thread.git/components/drivers/pic/SConscript, branch copilot/fix-riscv-none-job-failureUnnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/rt-thread.git/atom/components/drivers/pic/SConscript?h=copilot%2Ffix-riscv-none-job-failure2026-08-12T04:54:50Zfeat(dm): support OFW on Cortex-M targets2026-08-12T04:54:50ZRbb666zhangbingru@rt-thread.com2026-07-31T07:07:36Zurn:sha1:6b4f34204ed2da80b7c37b912612c65cebc30ce3
Add the ARM NVIC PIC driver, no-MMU I/O mapping, built-in FDT support, and Cortex-M CPU hooks required by the native RT-Thread device model.
[DRIVER/PIC] Add ARM GICv2/v3 V2M, ITS support.2024-09-19T13:14:42ZGuEe-GUI2991707448@qq.com2024-09-11T05:07:38Zurn:sha1:3d503e931bfa395822143beac3f06c39e620e68a
Fix some code style and init for V2M, ITS.
V2M is the PCI MSI/MSI-X for GICv2.
ITS is the PCI MSI/MSI-X for GICv3/v4.
Signed-off-by: GuEe-GUI <2991707448@qq.com>
[components][drivers]add pic-gic (#8388)2024-02-29T01:39:56Zzms12345685141075+zmshahaha@users.noreply.github.com2024-02-29T01:39:56Zurn:sha1:195f94ef1dc9ae48de16902e2ff1646ce0cffb57Drivers: Support Open Firmware API and model of PIC2023-07-05T08:45:16Zwusongjiewusongjie@rt-thread.com2023-07-05T05:50:18Zurn:sha1:8aa4366cb2910c2c61729608d9f2a90868d16deb
We support OFW API to replace fdt old API, and add
IRQ, IO, Platform-Bus, CPUs ... OFW node contorl.
To support work with Device Tree or ACPI in drivers
that use IRQ, we make a programmable interrupt
controller driver's model.
Signed-off-by: GuEe-GUI <GuEe-GUI@github.com>