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<title>rt-thread.git/components/drivers/pic/pic-gicv2.c, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/components/drivers/pic/pic-gicv2.c?h=master</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/components/drivers/pic/pic-gicv2.c?h=master'/>
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<updated>2025-02-11T06:58:18Z</updated>
<entry>
<title>[DM] Replace spinlock static init by RT_DEFINE_SPINLOCK</title>
<updated>2025-02-11T06:58:18Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2025-02-10T06:19:30Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=f50607628192b7ad1828e811bba238993b9afd55'/>
<id>urn:sha1:f50607628192b7ad1828e811bba238993b9afd55</id>
<content type='text'>
Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>[DM/PIC] Support AMP mode</title>
<updated>2024-12-18T13:42:12Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2024-12-09T11:35:46Z</published>
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<id>urn:sha1:b294fba5657afcc7b18bac488d2554a74fa8cc82</id>
<content type='text'>
Only support on &gt;= ARM GICv2

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>[DRIVER/PIC] Add ARM GICv2/v3 V2M, ITS support.</title>
<updated>2024-09-19T13:14:42Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2024-09-11T05:07:38Z</published>
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<id>urn:sha1:3d503e931bfa395822143beac3f06c39e620e68a</id>
<content type='text'>
Fix some code style and init for V2M, ITS.

V2M is the PCI MSI/MSI-X for GICv2.
ITS is the PCI MSI/MSI-X for GICv3/v4.

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>[DM/feature] Implement PIC irq state { get; set } (#9006)</title>
<updated>2024-05-31T09:37:39Z</updated>
<author>
<name>GUI</name>
<email>39894654+GuEe-GUI@users.noreply.github.com</email>
</author>
<published>2024-05-31T09:37:39Z</published>
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<id>urn:sha1:1d614a819d0d204b6061cac49daa168047b45903</id>
<content type='text'>
* [DM/feature] Implement PIC irq state { get; set }

There are some common state for irq:
1. Pending: IRQ was triggered, but software not ACK.
2. Active: IRQ was ACK, but not EOI.
3. Masked: IRQ was masked or umasked.

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;

* [DM/pic] Support IRQ state { get; set } for ARM GICv2/v3

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;

---------

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;</content>
</entry>
<entry>
<title> [PIC] Make affinity helper interface (#8995)</title>
<updated>2024-05-28T01:55:24Z</updated>
<author>
<name>GUI</name>
<email>39894654+GuEe-GUI@users.noreply.github.com</email>
</author>
<published>2024-05-28T01:55:24Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=de352aee62e55ec2bc0b142355c14f7895e4bd78'/>
<id>urn:sha1:de352aee62e55ec2bc0b142355c14f7895e4bd78</id>
<content type='text'>
* [PIC] Make affinity helper interface

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;

* [PIC/GIC] Fixup GIC affinity init

GICv2 is not support if current CPU is not startup,
but RT-Thread SMP is startup after the devices init
in the `main` thread.

This patch fixup the cpumask to init once and check
the init status in affinity interface.

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;

---------

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;</content>
</entry>
<entry>
<title>[components][drivers]add pic-gic (#8388)</title>
<updated>2024-02-29T01:39:56Z</updated>
<author>
<name>zms123456</name>
<email>85141075+zmshahaha@users.noreply.github.com</email>
</author>
<published>2024-02-29T01:39:56Z</published>
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<id>urn:sha1:195f94ef1dc9ae48de16902e2ff1646ce0cffb57</id>
<content type='text'>
</content>
</entry>
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