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<title>rt-thread.git/components/drivers, branch v5.3.0</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/components/drivers?h=v5.3.0</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/components/drivers?h=v5.3.0'/>
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<updated>2026-09-10T09:54:43Z</updated>
<entry>
<title>[device][mmcsd] Fix Arm Compiler 5 build compatibility #11690</title>
<updated>2026-09-10T09:54:43Z</updated>
<author>
<name>CYFS</name>
<email>2805686936@qq.com</email>
</author>
<published>2026-09-07T03:18:41Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=8074b7be5bd2427d0627ed1dd3a35c3a17c750ae'/>
<id>urn:sha1:8074b7be5bd2427d0627ed1dd3a35c3a17c750ae</id>
<content type='text'>
(cherry picked from commit 280bcfeec362f2164140606860b22026e5031c3d)
</content>
</entry>
<entry>
<title>wlan: fix silent failure of wifi cmd when device mode not bound#11696</title>
<updated>2026-08-17T06:34:57Z</updated>
<author>
<name>Kai</name>
<email>60053077+kaidegit@users.noreply.github.com</email>
</author>
<published>2026-08-17T06:34:57Z</published>
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<id>urn:sha1:d2acd7587eec680b57f8777c5c7a8dce7369471e</id>
<content type='text'>
</content>
</entry>
<entry>
<title>wlan: add WPA3/enterprise/WAPI/OWE/DPP security modes</title>
<updated>2026-08-17T03:00:04Z</updated>
<author>
<name>Kai</name>
<email>2857693944@qq.com</email>
</author>
<published>2026-08-11T08:00:26Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=0823a4b80c95c588f3c24d4e6e23e3a7b15cb9c0'/>
<id>urn:sha1:0823a4b80c95c588f3c24d4e6e23e3a7b15cb9c0</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[bsp/raspberry-pi] update DM support</title>
<updated>2026-08-16T11:56:03Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2026-08-15T14:36:46Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=f7258a6bb80d9be12e73675ab35a04651e32eda3'/>
<id>urn:sha1:f7258a6bb80d9be12e73675ab35a04651e32eda3</id>
<content type='text'>
- reorganize common Raspberry Pi drivers under the device framework
- add the Raspberry Pi 5 BSP, configuration and documentation
- add BCM2712 and DesignWare AXI DMA controller support
- distinguish BCM2712 DMA32 and DMA40 channels by channel mask
- restore DesignWare AXI DMA enable bits after controller reset
- support a shared AXI maximum burst length across DMA channels

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;
</content>
</entry>
<entry>
<title>[DM/OFW][PCI] Fix address translation and PCI resource enumeration (#11677)</title>
<updated>2026-08-14T04:42:32Z</updated>
<author>
<name>GUI</name>
<email>39894654+GuEe-GUI@users.noreply.github.com</email>
</author>
<published>2026-08-14T04:42:32Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=7bf01ae18d33fee5971c499466e178b6b262a46b'/>
<id>urn:sha1:7bf01ae18d33fee5971c499466e178b6b262a46b</id>
<content type='text'>
* [DM/OFW][PCI] Fix address translation and PCI resource enumeration

Rework OFW address translation to walk nested bus ranges in the correct
direction and cache "ranges" and "dma-ranges" independently. Handle PCI
three-cell addresses without treating the PCI flags cell as part of the
address, and fix CPU-to-DMA and DMA-to-CPU translation across nested
buses.

Fix PCI BAR sizing and assignment by disabling address decoding during
probing, preserving BAR attribute bits, and programming 64-bit BARs
correctly. Add device enable and disable helpers so resources and bus
mastering are enabled before driver probe.

Program bridge memory and prefetch windows while scanning downstream
buses, correctly link child buses into the PCI bus hierarchy, and avoid
unnecessary PCIe link retraining when the link is already active.

Allow host bridges without a device-tree pci-domain property by
allocating unique domains dynamically, while preserving explicit domain
assignments.

Fix MSI and MSI-X IRQ setup, rollback, vector addressing, and affinity
selection.

Add the Raspberry Pi PCI vendor ID for RP1 and other downstream devices.

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;

* style: format code with clang-format

* style: format complete changed files with clang-format

* drivers: pci: address OFW review feedback

* style: format PCI and OFW changes for current master

---------

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;</content>
</entry>
<entry>
<title>[dm][dma] Update DMA (#11678)</title>
<updated>2026-08-14T04:42:01Z</updated>
<author>
<name>GUI</name>
<email>39894654+GuEe-GUI@users.noreply.github.com</email>
</author>
<published>2026-08-14T04:42:01Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=f2c05253d11f0b5746ade4bdb7d8d838bb7a5df1'/>
<id>urn:sha1:f2c05253d11f0b5746ade4bdb7d8d838bb7a5df1</id>
<content type='text'>
* [dm][dma] update DMA interface

Extend DMA mapping to honor OFW dma-ranges even
when no reserved memory pool is present,
and add PCI host-bridge DMA-region translation for PCI devices.
Prefer 32-bit-addressable allocations for translated devices,
improve pool allocation fallbacks and synchronization,
and establish a linear mapping for installed DMA pools when possible.

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;

* [dm][dma] fixup PL330 work flow

Fix PL330 channel allocation so device-tree cells
select peripheral request lines rather than execution channels.
Generate proper peripheral DMA microcode using DMAWFP, DMALDP, DMASTP, and DMAFLUSHP,
encode burst lengths correctly,
honor transfer direction and non-secure attributes,
and allocate microcode from DMA-coherent memory.

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;

* style: format code with clang-format

* style: format complete changed files with clang-format

* drivers: dma: fix diagnostic format types

* style: format DMA changes for current master

---------

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;</content>
</entry>
<entry>
<title>[DM/Input] Add ADC joystick, keyboard, and touchscreen drivers (#11679)</title>
<updated>2026-08-14T04:41:00Z</updated>
<author>
<name>GUI</name>
<email>39894654+GuEe-GUI@users.noreply.github.com</email>
</author>
<published>2026-08-14T04:41:00Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=c1418dbd2e3b9596b4082b111b80bd5f86e76028'/>
<id>urn:sha1:c1418dbd2e3b9596b4082b111b80bd5f86e76028</id>
<content type='text'>
* [DM/Input] Add ADC joystick, keyboard, and touchscreen drivers

Add polling input drivers for ADC-connected joysticks and resistor-
ladder keys. Parse Linux-compatible device-tree bindings, acquire ADC
channels through the IIO framework, and report absolute-axis and key
events.

Add an SPI touchscreen driver for ADS7843, ADS7845, ADS7846, ADS7873,
TSC2046, and XPT2046-compatible controllers. Support pen interrupts,
coordinate and pressure reporting, sample filtering, regulator control,
power management, and common touchscreen properties.

Add an I2C touchscreen driver for Goodix GT9xx controllers with
multi-touch reporting, GPIO-based reset and address selection, interrupt
handling with polling fallback, regulator control, panel configuration,
and alternate-address recovery.

Adapt the drivers to the RT-Thread device model and input framework,
following the corresponding Linux input drivers and device-tree
bindings.

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;

* style: format code with clang-format

* drivers: input: address review feedback

* style: format input changes for current master

---------

Signed-off-by: GuEe-GUI &lt;2991707448@qq.com&gt;</content>
</entry>
<entry>
<title>[dm][sdio] Update for SDHCI- #11684 #11684</title>
<updated>2026-08-14T04:39:11Z</updated>
<author>
<name>GUI</name>
<email>39894654+GuEe-GUI@users.noreply.github.com</email>
</author>
<published>2026-08-14T04:39:11Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=4cf70e176c10548d929c1e4b2124cdfb0899c384'/>
<id>urn:sha1:4cf70e176c10548d929c1e4b2124cdfb0899c384</id>
<content type='text'>
</content>
</entry>
<entry>
<title>refactor(pic): dispatch NVIC IRQs through traps</title>
<updated>2026-08-12T04:54:50Z</updated>
<author>
<name>Rbb666</name>
<email>zhangbingru@rt-thread.com</email>
</author>
<published>2026-08-03T03:54:48Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=46fdeefb3239f8f4a22a373fc6fd362499389c9e'/>
<id>urn:sha1:46fdeefb3239f8f4a22a373fc6fd362499389c9e</id>
<content type='text'>
</content>
</entry>
<entry>
<title>fix(dm): route Cortex-M resets through power core</title>
<updated>2026-08-12T04:54:50Z</updated>
<author>
<name>Rbb666</name>
<email>zhangbingru@rt-thread.com</email>
</author>
<published>2026-08-03T03:54:06Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=1f23e3f27052a6b7fd75def2da634c79db5773e2'/>
<id>urn:sha1:1f23e3f27052a6b7fd75def2da634c79db5773e2</id>
<content type='text'>
</content>
</entry>
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