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<title>rt-thread.git/components/libc/libdl/arch/riscv.c, branch v4.0.x</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/components/libc/libdl/arch/riscv.c?h=v4.0.x</id>
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<updated>2021-04-27T13:24:42Z</updated>
<entry>
<title>[ADD]riscv.c dlmodule can support riscv architecture</title>
<updated>2021-04-27T13:24:42Z</updated>
<author>
<name>chunyexixiaoyu</name>
<email>834670833@qq.com</email>
</author>
<published>2021-04-25T12:01:23Z</published>
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<id>urn:sha1:2afca007874df3a056dcad382a303b4903e6206d</id>
<content type='text'>
[CHG]dlelf.c support distinguishing 32-bit ELF format and 64-bit ELF format
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