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<title>rt-thread.git/components/lwp/arch/aarch64/common, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/components/lwp/arch/aarch64/common?h=master</id>
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<updated>2026-04-29T22:19:58Z</updated>
<entry>
<title>更新 vdso 框架</title>
<updated>2026-04-29T22:19:58Z</updated>
<author>
<name>rcitach</name>
<email>yearsince@yeah.net</email>
</author>
<published>2026-04-21T09:51:56Z</published>
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<id>urn:sha1:c92480894c97378cecb492086404b2a0c2bebc07</id>
<content type='text'>
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<entry>
<title>[lwp/aarch64] Fix macro definition style in reloc.c</title>
<updated>2026-03-12T06:39:13Z</updated>
<author>
<name>huangshuhua</name>
<email>hyd007@163.com</email>
</author>
<published>2026-03-09T02:00:55Z</published>
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<id>urn:sha1:4617729c4c4d8ca231ba1ca9805bf3856a164950</id>
<content type='text'>
Split the merged #define macros on line 13 into separate lines to comply with coding standards and avoid potential preprocessor issues.
</content>
</entry>
<entry>
<title>[components][clock_time] Refactor time subsystem around clock_time (#11111)</title>
<updated>2026-01-31T09:44:27Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2026-01-31T09:44:27Z</published>
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<id>urn:sha1:743b614875fc33257be47ab53b6c5e040ec27893</id>
<content type='text'>
* [components][clock_time] Refactor time subsystem around clock_time

Introduce the clock_time core with clock source/event separation, high-resolution scheduling, and boot-time helpers, plus clock_timer adapters for timer peripherals.

Remove legacy ktime/cputime/hwtimer implementations and migrate arch and BSP time paths to the new subsystem while keeping POSIX time integration functional.

Update drivers, Kconfig/SConscript wiring, documentation, and tests; add clock_time overview docs and align naming to clock_boottime/clock_hrtimer/clock_timer.

* [components][clock_time] Use BSP-provided clock timer frequency on riscv64

* [risc-v] Use runtime clock timer frequency for tick and delays

* [bsp] Add clock timer frequency hooks for riscv64 boards

* [bsp] Update Renesas RA driver doc clock_timer link

* [bsp] Sync zynqmp-r5-axu4ev rtconfig after config refresh

* [bsp][rk3500] Update rk3500 clock configuration

* [bsp][hpmicro] Add rt_hw_us_delay hook and update board delays

* [bsp][stm32l496-st-nucleo] enable clock_time for hwtimer sample in ci

* [bsp][hpmicro] Fix rtconfig include scope for hpm6750evk

Move rtconfig.h include outside the ENET_MULTIPLE_PORT guard for hpm6750evk and hpm6750evk2 so configuration macros are available regardless of ENET settings.

* [bsp][raspi3] select clock time for systimer

* [bsp][hpm5300evk] Trim trailing blank line

* [bsp][hpm5301evklite] Trim trailing blank line

* [bsp][hpm5e00evk] Trim trailing blank line

* [bsp][hpm6200evk] Trim trailing blank line

* [bsp][hpm6300evk] Trim trailing blank line

* [bsp][hpm6750evk] Trim trailing blank line

* [bsp][hpm6750evk2] Trim trailing blank line

* [bsp][hpm6750evkmini] Trim trailing blank line

* [bsp][hpm6800evk] Trim trailing blank line

* [bsp][hpm6e00evk] Trim trailing blank line

* [bsp][nxp] switch lpc178x to gcc and remove mcx timer source

* [bsp][stm32] fix the CONFIG_RT_USING_CLOCK_TIME issue.

* [docs][clock_time] add clock time documentation

* [docs][clock_time] Update clock time subsystem documentation

- Update device driver index to use correct page reference
- Clarify upper layer responsibilities in architecture overview
- Update README to describe POSIX/libc, Soft RTC, and device driver usage
- Refine architecture diagram with improved layout and color scheme
- Remove obsolete clock_timer.md file

* [kernel][utest] Trim trailing space

* [clock_time] Fix hrtimer wrap handling

* [clock_time] fix the static rt_inline issue

* [clock_time] fix the rt_clock_hrtimer_control result issue</content>
</entry>
<entry>
<title>[smart] Add vDSO support for RISC-V architecture and refactor related components</title>
<updated>2025-05-19T10:29:26Z</updated>
<author>
<name>bernard</name>
<email>bernard.xiong@rt-thread.com</email>
</author>
<published>2025-05-12T11:29:35Z</published>
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<id>urn:sha1:721dfbfe017583914d37ad30aea5d5634070ede2</id>
<content type='text'>
- Implemented vDSO functionality for the RISC-V architecture, including the necessary source files and linker scripts.
- Introduced a new `vdso_sys.c` file for RISC-V, containing functions to handle time retrieval using the vDSO mechanism.
- Created architecture-specific linker scripts (`vdso.lds.S`) for both AArch64 and RISC-V.
- Updated the build system to support vDSO compilation for RISC-V, including necessary adjustments in `SConstruct` files.
- Refactored existing vDSO code to improve compatibility and maintainability across architectures.
- Adjusted the maximum number of PTY devices in the terminal configuration from 64 to 32 for better resource management.
- Fixed minor issues in existing code, including correcting the path for the vDSO shared library and ensuring proper function definitions.
</content>
</entry>
<entry>
<title>[lwp][vdso] Add VDSO functionality under the aarch64 architecture (#9176)</title>
<updated>2024-07-15T09:58:29Z</updated>
<author>
<name>rcitachi</name>
<email>yearsince@yeah.net</email>
</author>
<published>2024-07-15T09:58:29Z</published>
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<id>urn:sha1:14fb55933b173811467159df3e80e314b2e4415c</id>
<content type='text'>
Add VDSO functionality under the aarch64 architecture</content>
</entry>
<entry>
<title>[rt-smart] 弱化 RT_USING_LWP，使用 RT_USING_SMART 作为宏配置 (#6740)</title>
<updated>2022-12-16T10:38:28Z</updated>
<author>
<name>guo</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-12-16T10:38:28Z</published>
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<id>urn:sha1:68ca9f07a60ad5cbe52b37b52299327b6246e7f7</id>
<content type='text'>
* [dfs] sync cromfs

* [rt-smart]Weaken RT_USING_LWP, use RT_USING_SMART as macro configuration

* [format] fix some format issue.</content>
</entry>
<entry>
<title>sync branch rt-smart. (#6641)</title>
<updated>2022-12-03T04:07:44Z</updated>
<author>
<name>guo</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-12-03T04:07:44Z</published>
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<id>urn:sha1:ecf2d8215961ca7c539132b62a72df6072cc3e14</id>
<content type='text'>
* Synchronize the code of the rt mart branch to the master branch.
  * TTY device
  * Add lwP code from rt-smart
  * Add vnode in DFS, but DFS will be re-write for rt-smart
  * There are three libcpu for rt-smart:
    * arm/cortex-a, arm/aarch64
    * riscv64

Co-authored-by: Rbb666 &lt;zhangbingru@rt-thread.com&gt;
Co-authored-by: zhkag &lt;zhkag@foxmail.com&gt;</content>
</entry>
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