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<title>rt-thread.git/components/lwp/arch/risc-v, branch copilot/create-device-driver-model-docs</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/components/lwp/arch/risc-v?h=copilot%2Fcreate-device-driver-model-docs</id>
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<updated>2025-07-23T01:39:17Z</updated>
<entry>
<title>[lwp][rv64] riscv: fix potential signal handler infinite loop</title>
<updated>2025-07-23T01:39:17Z</updated>
<author>
<name>Yulong Wang</name>
<email>2302147681@qq.com</email>
</author>
<published>2025-07-13T04:04:20Z</published>
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<id>urn:sha1:ee1fe2024e5a6c0d8582a5225a3e1083b88b2032</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[lwp][rv64] restore tp register in arch_thread_signal_enter to fix user-mode memory access</title>
<updated>2025-07-23T01:38:35Z</updated>
<author>
<name>Yulong Wang</name>
<email>2302147681@qq.com</email>
</author>
<published>2025-07-12T13:10:48Z</published>
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<id>urn:sha1:e7a40ae6ec1fdcb0d74a4902cfbd50aee7ee8e8f</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[smart] rename the Group name to 'lwProcess' and optimize the error handling for vDSO building.</title>
<updated>2025-07-07T01:44:37Z</updated>
<author>
<name>bernard</name>
<email>bernard.xiong@rt-thread.com</email>
</author>
<published>2025-06-25T16:05:00Z</published>
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<id>urn:sha1:172676e115666ac3f91e468f6d668b62b1844b45</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[smart] Add vDSO support for RISC-V architecture and refactor related components</title>
<updated>2025-05-19T10:29:26Z</updated>
<author>
<name>bernard</name>
<email>bernard.xiong@rt-thread.com</email>
</author>
<published>2025-05-12T11:29:35Z</published>
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<id>urn:sha1:721dfbfe017583914d37ad30aea5d5634070ede2</id>
<content type='text'>
- Implemented vDSO functionality for the RISC-V architecture, including the necessary source files and linker scripts.
- Introduced a new `vdso_sys.c` file for RISC-V, containing functions to handle time retrieval using the vDSO mechanism.
- Created architecture-specific linker scripts (`vdso.lds.S`) for both AArch64 and RISC-V.
- Updated the build system to support vDSO compilation for RISC-V, including necessary adjustments in `SConstruct` files.
- Refactored existing vDSO code to improve compatibility and maintainability across architectures.
- Adjusted the maximum number of PTY devices in the terminal configuration from 64 to 32 for better resource management.
- Fixed minor issues in existing code, including correcting the path for the vDSO shared library and ensuring proper function definitions.
</content>
</entry>
<entry>
<title>[lwp/riscv]修正用户态参数空间占用堆地址空间的问题 (#10014)</title>
<updated>2025-02-24T01:17:22Z</updated>
<author>
<name>heyuanjie87</name>
<email>943313837@qq.com</email>
</author>
<published>2025-02-24T01:17:22Z</published>
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<id>urn:sha1:5206b3ae2dbb455029696da0097c8ea3634b4af1</id>
<content type='text'>
* [lwp/riscv]修正用户态参数空间占用堆空间的问题</content>
</entry>
<entry>
<title>[rv]修正signal退出后用户态sp少8的问题 (#9080)</title>
<updated>2024-06-24T13:36:32Z</updated>
<author>
<name>heyuanjie87</name>
<email>943313837@qq.com</email>
</author>
<published>2024-06-24T13:36:32Z</published>
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<id>urn:sha1:a5a89c439f905f68fee98f7b329b348a1c2171b3</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[rv]信号处理进入用户态前恢复gp (#9072)</title>
<updated>2024-06-21T01:09:41Z</updated>
<author>
<name>heyuanjie87</name>
<email>sc943313837@gmail.com</email>
</author>
<published>2024-06-21T01:09:41Z</published>
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<id>urn:sha1:06ad67d549533e11fd3a2488ee776e36441a4d27</id>
<content type='text'>
* [rv/virt/stackframe.h]添加GP寄存器保存偏移量宏

* 【rv/c906/stackframe.h]定义GP寄存器存储偏移量

* [rv]信号处理切换到用户态前恢复gp</content>
</entry>
<entry>
<title>[libcpu] rv64: support for ARCH_REMAP_KERNEL (#9067)</title>
<updated>2024-06-18T03:15:59Z</updated>
<author>
<name>Shell</name>
<email>smokewood@qq.com</email>
</author>
<published>2024-06-18T03:15:59Z</published>
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<id>urn:sha1:65c99472253051521eaa5a670085b2cc0da4be3e</id>
<content type='text'>
* [libcpu] support for ARCH_REMAP_KERNEL

These changes introduce support for the ARCH_REMAP_KERNEL configuration,
which isolates kernel space in high virtual address regions. This feature
is necessary to enhance memory protection and management by segregating
user and kernel spaces more effectively.

Changes:
- Updated conditional macros to check for ARCH_REMAP_KERNEL instead of
  ARCH_KERNEL_IN_HIGH_VA in board initialization files to reflect the new
  configuration option.
- Modified qemu-virt64-riscv Kconfig and SConstruct files to include and
  utilize ARCH_REMAP_KERNEL.
- Created a new linker script `link_smart.lds` for smart linking in qemu-virt64-riscv.
- Updated rtconfig.py to use a more flexible execution path setup.
- Enhanced user address space definitions in `lwp_arch.h` to support the
  new virtual address mappings.
- Adjusted kernel memory initialization and mapping logic in `c906/mmu.c`
  and `virt64/mmu.c` to account for high virtual address regions.
- Added Kconfig option to enable ARCH_REMAP_KERNEL for RISCV64 architectures.
- Enhanced memory setup functions to support new mapping scheme, including
  updates to early page table setup and address relocation logic.

These modifications ensure that the system can utilize high memory
addresses for the kernel, improving memory isolation and system stability.

Signed-off-by: Shell &lt;smokewood@qq.com&gt;

* fixup: CI run failed

* bsp: default config without using smart

* fixup: static checks

* restore rt_hw_mmu_kernel_map_init for D1

---------

Signed-off-by: Shell &lt;smokewood@qq.com&gt;</content>
</entry>
<entry>
<title>[lwp/riscv]进入libc前初始化用户态sp (#8997)</title>
<updated>2024-05-28T22:52:38Z</updated>
<author>
<name>heyuanjie87</name>
<email>sc943313837@gmail.com</email>
</author>
<published>2024-05-28T22:52:38Z</published>
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<id>urn:sha1:326150e2f4991679f5a4e39cfdc42378a328e983</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu] discard rt_current_thread (#8976)</title>
<updated>2024-05-26T14:00:17Z</updated>
<author>
<name>Shell</name>
<email>smokewood@qq.com</email>
</author>
<published>2024-05-26T14:00:17Z</published>
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<id>urn:sha1:397cdcd1320d096d41523cbbe0bf743e872d5e70</id>
<content type='text'>
* [libcpu] rv64: discard rt_current_thread

* arm: using rt_thread_self to fetch current TCB</content>
</entry>
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