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<title>rt-thread.git/components/lwp/arch/risc-v, branch v5.0.2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/components/lwp/arch/risc-v?h=v5.0.2</id>
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<updated>2023-09-15T07:57:08Z</updated>
<entry>
<title>[smart] fix rt_memcpy to lwp_memcpy in smart source (#8033)</title>
<updated>2023-09-15T07:57:08Z</updated>
<author>
<name>Shell</name>
<email>smokewood@qq.com</email>
</author>
<published>2023-09-15T07:57:08Z</published>
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<id>urn:sha1:e7c3ca61fd2a13fe8d1623e7cdd215f17eedf13c</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[smart/syscall] fix exit(2) and add exit_group(2) (#8005)</title>
<updated>2023-09-09T01:35:56Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-09-09T01:35:56Z</published>
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<id>urn:sha1:47b183a2978a8b474e25ec38b37ef5741a50d724</id>
<content type='text'>
Signed-off-by: shell &lt;smokewood@qq.com&gt;
Signed-off-by: shell &lt;wangxiaoyao@rt-thread.com&gt;
Signed-off-by: Shell &lt;smokewood@qq.com&gt;</content>
</entry>
<entry>
<title>[component/lwp] support more feature of signal from IEEE Std 1003.1-2017 (#7828)</title>
<updated>2023-07-19T16:02:41Z</updated>
<author>
<name>Shell</name>
<email>smokewood@qq.com</email>
</author>
<published>2023-07-19T16:02:41Z</published>
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<id>urn:sha1:58e0ddf2879032495a74897c34e3605de929f82c</id>
<content type='text'>
Signed-off-by: Shell &lt;smokewood@qq.com&gt;</content>
</entry>
<entry>
<title>[libcpu][component][debug] add debug info for gdb (#7033)</title>
<updated>2023-05-14T15:48:16Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-05-14T15:48:16Z</published>
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<id>urn:sha1:b7554a70d21582cab97028477941fb692ef248b8</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[components/mm] support for scalable memory management (#7277)</title>
<updated>2023-04-22T15:59:11Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-04-22T15:59:11Z</published>
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<id>urn:sha1:470454d201ebb89aa72525f8c3fb562e372f4f56</id>
<content type='text'>
* [mm/page] multi-list page manager
[mm/page] page debugger
[libcpu/aarch64] hugepage support

* [quality] remove void-arith

* [format] remove kasan codes</content>
</entry>
<entry>
<title>[lwp] arch should recycle resource it allocated</title>
<updated>2023-03-11T11:01:33Z</updated>
<author>
<name>wangxiaoyao</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-03-09T02:49:25Z</published>
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<id>urn:sha1:672966cc41e16e48fa28d2818d25df56452bafba</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[rt-smart] handling kernel from accessing unmapped user stack (#6957)</title>
<updated>2023-02-24T06:52:16Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-02-24T06:52:16Z</published>
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<id>urn:sha1:382e9bcac746b408b5b01ea2f59338428ab203dd</id>
<content type='text'>
[rt-smart] handling kernel from accessing unmapped user stack</content>
</entry>
<entry>
<title>[rt-smart] kernel virtual memory management layer (#6809)</title>
<updated>2023-01-09T02:08:55Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-01-09T02:08:55Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=7450ef6c4d71f992444d27f4a26c16f813ed8e55'/>
<id>urn:sha1:7450ef6c4d71f992444d27f4a26c16f813ed8e55</id>
<content type='text'>
synchronize virtual memory system works.
adding kernel virtual memory management layer for page-based MMU enabled architecture
porting libcpu MMU codes
porting lwp memory related codes</content>
</entry>
<entry>
<title>[rt-smart] 弱化 RT_USING_LWP，使用 RT_USING_SMART 作为宏配置 (#6740)</title>
<updated>2022-12-16T10:38:28Z</updated>
<author>
<name>guo</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-12-16T10:38:28Z</published>
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<id>urn:sha1:68ca9f07a60ad5cbe52b37b52299327b6246e7f7</id>
<content type='text'>
* [dfs] sync cromfs

* [rt-smart]Weaken RT_USING_LWP, use RT_USING_SMART as macro configuration

* [format] fix some format issue.</content>
</entry>
<entry>
<title>[smart][risc-v/libcpu] port rv64 cpu code (#6704)</title>
<updated>2022-12-10T14:16:42Z</updated>
<author>
<name>Shell</name>
<email>maschareno@outlook.com</email>
</author>
<published>2022-12-10T14:16:42Z</published>
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<id>urn:sha1:e991be9c51c54883b56ee3d9e7f30db33c404192</id>
<content type='text'>
* [risc-v/libcpu] porting Smart &amp; RTOS
* [fix] rv64 plic
* [risc-v/rv64] remove macro in rtdef</content>
</entry>
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