<feed xmlns='http://www.w3.org/2005/Atom'>
<title>rt-thread.git/components/lwp/arch, branch riscv64</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/components/lwp/arch?h=riscv64</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/components/lwp/arch?h=riscv64'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/'/>
<updated>2024-06-27T16:23:09Z</updated>
<entry>
<title>[format] cleanup libcpu/aarch64 (#8950)</title>
<updated>2024-06-27T16:23:09Z</updated>
<author>
<name>Shell</name>
<email>smokewood@qq.com</email>
</author>
<published>2024-06-27T16:23:09Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=90917cc75af9406834c14fd25140405ba6f72d6d'/>
<id>urn:sha1:90917cc75af9406834c14fd25140405ba6f72d6d</id>
<content type='text'>
* [dfs] fixup compiler warning

Signed-off-by: Shell &lt;smokewood@qq.com&gt;

* [format] libcpu/arm64: separate context switching codes

Signed-off-by: Shell &lt;smokewood@qq.com&gt;

* [format] libcpu/arm64: separate vector

Signed-off-by: Shell &lt;smokewood@qq.com&gt;

* [format] libcpu/arm64: separate context_gcc.S

Signed-off-by: Shell &lt;smokewood@qq.com&gt;

* [format] libcpu/arm64: moving headers to include directory

Signed-off-by: Shell &lt;smokewood@qq.com&gt;

* style: replace tab with space

---------

Signed-off-by: Shell &lt;smokewood@qq.com&gt;</content>
</entry>
<entry>
<title>[rv]修正signal退出后用户态sp少8的问题 (#9080)</title>
<updated>2024-06-24T13:36:32Z</updated>
<author>
<name>heyuanjie87</name>
<email>943313837@qq.com</email>
</author>
<published>2024-06-24T13:36:32Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=a5a89c439f905f68fee98f7b329b348a1c2171b3'/>
<id>urn:sha1:a5a89c439f905f68fee98f7b329b348a1c2171b3</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[rv]信号处理进入用户态前恢复gp (#9072)</title>
<updated>2024-06-21T01:09:41Z</updated>
<author>
<name>heyuanjie87</name>
<email>sc943313837@gmail.com</email>
</author>
<published>2024-06-21T01:09:41Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=06ad67d549533e11fd3a2488ee776e36441a4d27'/>
<id>urn:sha1:06ad67d549533e11fd3a2488ee776e36441a4d27</id>
<content type='text'>
* [rv/virt/stackframe.h]添加GP寄存器保存偏移量宏

* 【rv/c906/stackframe.h]定义GP寄存器存储偏移量

* [rv]信号处理切换到用户态前恢复gp</content>
</entry>
<entry>
<title>[libcpu] rv64: support for ARCH_REMAP_KERNEL (#9067)</title>
<updated>2024-06-18T03:15:59Z</updated>
<author>
<name>Shell</name>
<email>smokewood@qq.com</email>
</author>
<published>2024-06-18T03:15:59Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=65c99472253051521eaa5a670085b2cc0da4be3e'/>
<id>urn:sha1:65c99472253051521eaa5a670085b2cc0da4be3e</id>
<content type='text'>
* [libcpu] support for ARCH_REMAP_KERNEL

These changes introduce support for the ARCH_REMAP_KERNEL configuration,
which isolates kernel space in high virtual address regions. This feature
is necessary to enhance memory protection and management by segregating
user and kernel spaces more effectively.

Changes:
- Updated conditional macros to check for ARCH_REMAP_KERNEL instead of
  ARCH_KERNEL_IN_HIGH_VA in board initialization files to reflect the new
  configuration option.
- Modified qemu-virt64-riscv Kconfig and SConstruct files to include and
  utilize ARCH_REMAP_KERNEL.
- Created a new linker script `link_smart.lds` for smart linking in qemu-virt64-riscv.
- Updated rtconfig.py to use a more flexible execution path setup.
- Enhanced user address space definitions in `lwp_arch.h` to support the
  new virtual address mappings.
- Adjusted kernel memory initialization and mapping logic in `c906/mmu.c`
  and `virt64/mmu.c` to account for high virtual address regions.
- Added Kconfig option to enable ARCH_REMAP_KERNEL for RISCV64 architectures.
- Enhanced memory setup functions to support new mapping scheme, including
  updates to early page table setup and address relocation logic.

These modifications ensure that the system can utilize high memory
addresses for the kernel, improving memory isolation and system stability.

Signed-off-by: Shell &lt;smokewood@qq.com&gt;

* fixup: CI run failed

* bsp: default config without using smart

* fixup: static checks

* restore rt_hw_mmu_kernel_map_init for D1

---------

Signed-off-by: Shell &lt;smokewood@qq.com&gt;</content>
</entry>
<entry>
<title>[lwp/riscv]进入libc前初始化用户态sp (#8997)</title>
<updated>2024-05-28T22:52:38Z</updated>
<author>
<name>heyuanjie87</name>
<email>sc943313837@gmail.com</email>
</author>
<published>2024-05-28T22:52:38Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=326150e2f4991679f5a4e39cfdc42378a328e983'/>
<id>urn:sha1:326150e2f4991679f5a4e39cfdc42378a328e983</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu] arm: fixup signal handling (#8988)</title>
<updated>2024-05-26T14:00:48Z</updated>
<author>
<name>Shell</name>
<email>smokewood@qq.com</email>
</author>
<published>2024-05-26T14:00:48Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=5f71da566a00176961f4ca546d1a10861bbebc2c'/>
<id>urn:sha1:5f71da566a00176961f4ca546d1a10861bbebc2c</id>
<content type='text'>
Signed-off-by: Shell &lt;smokewood@qq.com&gt;</content>
</entry>
<entry>
<title>[libcpu] discard rt_current_thread (#8976)</title>
<updated>2024-05-26T14:00:17Z</updated>
<author>
<name>Shell</name>
<email>smokewood@qq.com</email>
</author>
<published>2024-05-26T14:00:17Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=397cdcd1320d096d41523cbbe0bf743e872d5e70'/>
<id>urn:sha1:397cdcd1320d096d41523cbbe0bf743e872d5e70</id>
<content type='text'>
* [libcpu] rv64: discard rt_current_thread

* arm: using rt_thread_self to fetch current TCB</content>
</entry>
<entry>
<title>[smart] fixup arm64 aspace switch (#8925)</title>
<updated>2024-05-10T01:17:19Z</updated>
<author>
<name>Shell</name>
<email>smokewood@qq.com</email>
</author>
<published>2024-05-10T01:17:19Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=017b2a5a4461f349958e4b7c629679df3b1f9d7f'/>
<id>urn:sha1:017b2a5a4461f349958e4b7c629679df3b1f9d7f</id>
<content type='text'>
* [smart] fixup arm64 aspace switch

Signed-off-by: Shell &lt;smokewood@qq.com&gt;

* fixup: arm add arch_kernel_mmu_table_get

---------

Signed-off-by: Shell &lt;smokewood@qq.com&gt;</content>
</entry>
<entry>
<title>sync smart &amp; dfs (#8672)</title>
<updated>2024-03-28T15:42:56Z</updated>
<author>
<name>Shell</name>
<email>smokewood@qq.com</email>
</author>
<published>2024-03-28T15:42:56Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=83e95bdff4c48c661b50e1eec56d5fd293b28fbb'/>
<id>urn:sha1:83e95bdff4c48c661b50e1eec56d5fd293b28fbb</id>
<content type='text'>
Signed-off-by: xqyjlj &lt;xqyjlj@126.com&gt;
Signed-off-by: Shell &lt;smokewood@qq.com&gt;
Co-authored-by: xqyjlj &lt;xqyjlj@126.com&gt;</content>
</entry>
<entry>
<title>🎈 perf: perf rt_hw_interrupt_disable/enable (#8042)</title>
<updated>2023-10-25T12:31:25Z</updated>
<author>
<name>xqyjlj</name>
<email>xqyjlj@126.com</email>
</author>
<published>2023-10-25T12:31:25Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=3283f54c7a0444b2e51ec79a4da57e7871528f05'/>
<id>urn:sha1:3283f54c7a0444b2e51ec79a4da57e7871528f05</id>
<content type='text'>
Signed-off-by: Shell &lt;smokewood@qq.com&gt;
Co-authored-by: Shell &lt;smokewood@qq.com&gt;</content>
</entry>
</feed>
