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<title>rt-thread.git/components/lwp/lwp_shm.c, branch copilot/fix-aarch64-github-actions-job</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/components/lwp/lwp_shm.c?h=copilot%2Ffix-aarch64-github-actions-job</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/components/lwp/lwp_shm.c?h=copilot%2Ffix-aarch64-github-actions-job'/>
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<updated>2025-11-15T06:20:36Z</updated>
<entry>
<title>doxygen: add comments for lwp shared memory APIs</title>
<updated>2025-11-15T06:20:36Z</updated>
<author>
<name>ibvqeibob</name>
<email>2601187225@qq.com</email>
</author>
<published>2025-11-06T02:40:38Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=4e41e700f0b00a874d5d48ed373e5c51cc22245a'/>
<id>urn:sha1:4e41e700f0b00a874d5d48ed373e5c51cc22245a</id>
<content type='text'>
Add Doxygen-style comments for the lwp shared memory public APIs
in components/lwp/lwp_shm.c and the related control structure.
This change is documentation-only and does not modify any runtime
behavior or logic.

Signed-off-by: ibvqeibob &lt;2601187225@qq.com&gt;
</content>
</entry>
<entry>
<title>Sync dfs lwp (#8123)</title>
<updated>2023-10-17T05:07:59Z</updated>
<author>
<name>geniusgogo</name>
<email>2041245+geniusgogo@users.noreply.github.com</email>
</author>
<published>2023-10-17T05:07:59Z</published>
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<id>urn:sha1:ecd29fda6005ef19c625f194f9311259ba907a78</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[components/mm] support for scalable memory management (#7277)</title>
<updated>2023-04-22T15:59:11Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-04-22T15:59:11Z</published>
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<id>urn:sha1:470454d201ebb89aa72525f8c3fb562e372f4f56</id>
<content type='text'>
* [mm/page] multi-list page manager
[mm/page] page debugger
[libcpu/aarch64] hugepage support

* [quality] remove void-arith

* [format] remove kasan codes</content>
</entry>
<entry>
<title>[rt-smart] testcase &amp; improvements for memory management (#7099)</title>
<updated>2023-03-30T00:25:15Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-03-30T00:25:15Z</published>
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<id>urn:sha1:eec78d9f5d3f0a944500a1cac5802dfee2befc7b</id>
<content type='text'>
* [utest/mm] add testcase for create/init
format codes of create/init in components/mm

* [libcpu/aarch64] fix user stack check routine

* [kservice] export API for utest

* [utest/mm] testcase for aspace_map
format &amp; modify the files under components/mm related with aspace_map

* [lwp/user_mm] add user_map_varea for mmap feature

* [mm] rename rt_mm_fault_try_fix to rt_aspace_fault_try_fix

* [utest/mm] testcase for synchronization

* [mm] modify unmap api to improve throughput

* [utest/mm] testcases for cache and varea map

* [format] remove extra space

* [utest/mm] fix testcase problem in header

* [lwp] extend map_user_varea with a flag

* [utest/mm] testcase for lwp_map_user_varea

* [libcpu/arm/cortex-a] fix kernel space layout

* [utest/mm] adjust for armv7 arch</content>
</entry>
<entry>
<title>[lwp] save virtual addr in shm structure</title>
<updated>2023-02-25T12:05:59Z</updated>
<author>
<name>wangxiaoyao</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-02-25T11:11:26Z</published>
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<id>urn:sha1:fef26077640c9f243c41eef5204abad025f6e3a9</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[mm] distinguish NULL and MAP_FAILED</title>
<updated>2023-02-21T00:48:49Z</updated>
<author>
<name>wangxiaoyao</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-02-20T05:44:20Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=855aef9c9c59df12102d6ddfe43ef02c05171036'/>
<id>urn:sha1:855aef9c9c59df12102d6ddfe43ef02c05171036</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[rt-smart] kernel virtual memory management layer (#6809)</title>
<updated>2023-01-09T02:08:55Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-01-09T02:08:55Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=7450ef6c4d71f992444d27f4a26c16f813ed8e55'/>
<id>urn:sha1:7450ef6c4d71f992444d27f4a26c16f813ed8e55</id>
<content type='text'>
synchronize virtual memory system works.
adding kernel virtual memory management layer for page-based MMU enabled architecture
porting libcpu MMU codes
porting lwp memory related codes</content>
</entry>
<entry>
<title>[rt-smart] 弱化 RT_USING_LWP，使用 RT_USING_SMART 作为宏配置 (#6740)</title>
<updated>2022-12-16T10:38:28Z</updated>
<author>
<name>guo</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-12-16T10:38:28Z</published>
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<id>urn:sha1:68ca9f07a60ad5cbe52b37b52299327b6246e7f7</id>
<content type='text'>
* [dfs] sync cromfs

* [rt-smart]Weaken RT_USING_LWP, use RT_USING_SMART as macro configuration

* [format] fix some format issue.</content>
</entry>
<entry>
<title>sync branch rt-smart. (#6641)</title>
<updated>2022-12-03T04:07:44Z</updated>
<author>
<name>guo</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-12-03T04:07:44Z</published>
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<id>urn:sha1:ecf2d8215961ca7c539132b62a72df6072cc3e14</id>
<content type='text'>
* Synchronize the code of the rt mart branch to the master branch.
  * TTY device
  * Add lwP code from rt-smart
  * Add vnode in DFS, but DFS will be re-write for rt-smart
  * There are three libcpu for rt-smart:
    * arm/cortex-a, arm/aarch64
    * riscv64

Co-authored-by: Rbb666 &lt;zhangbingru@rt-thread.com&gt;
Co-authored-by: zhkag &lt;zhkag@foxmail.com&gt;</content>
</entry>
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