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<title>rt-thread.git/components/lwp, branch revert-11186-master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/components/lwp?h=revert-11186-master</id>
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<updated>2026-01-31T09:44:27Z</updated>
<entry>
<title>[components][clock_time] Refactor time subsystem around clock_time (#11111)</title>
<updated>2026-01-31T09:44:27Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2026-01-31T09:44:27Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=743b614875fc33257be47ab53b6c5e040ec27893'/>
<id>urn:sha1:743b614875fc33257be47ab53b6c5e040ec27893</id>
<content type='text'>
* [components][clock_time] Refactor time subsystem around clock_time

Introduce the clock_time core with clock source/event separation, high-resolution scheduling, and boot-time helpers, plus clock_timer adapters for timer peripherals.

Remove legacy ktime/cputime/hwtimer implementations and migrate arch and BSP time paths to the new subsystem while keeping POSIX time integration functional.

Update drivers, Kconfig/SConscript wiring, documentation, and tests; add clock_time overview docs and align naming to clock_boottime/clock_hrtimer/clock_timer.

* [components][clock_time] Use BSP-provided clock timer frequency on riscv64

* [risc-v] Use runtime clock timer frequency for tick and delays

* [bsp] Add clock timer frequency hooks for riscv64 boards

* [bsp] Update Renesas RA driver doc clock_timer link

* [bsp] Sync zynqmp-r5-axu4ev rtconfig after config refresh

* [bsp][rk3500] Update rk3500 clock configuration

* [bsp][hpmicro] Add rt_hw_us_delay hook and update board delays

* [bsp][stm32l496-st-nucleo] enable clock_time for hwtimer sample in ci

* [bsp][hpmicro] Fix rtconfig include scope for hpm6750evk

Move rtconfig.h include outside the ENET_MULTIPLE_PORT guard for hpm6750evk and hpm6750evk2 so configuration macros are available regardless of ENET settings.

* [bsp][raspi3] select clock time for systimer

* [bsp][hpm5300evk] Trim trailing blank line

* [bsp][hpm5301evklite] Trim trailing blank line

* [bsp][hpm5e00evk] Trim trailing blank line

* [bsp][hpm6200evk] Trim trailing blank line

* [bsp][hpm6300evk] Trim trailing blank line

* [bsp][hpm6750evk] Trim trailing blank line

* [bsp][hpm6750evk2] Trim trailing blank line

* [bsp][hpm6750evkmini] Trim trailing blank line

* [bsp][hpm6800evk] Trim trailing blank line

* [bsp][hpm6e00evk] Trim trailing blank line

* [bsp][nxp] switch lpc178x to gcc and remove mcx timer source

* [bsp][stm32] fix the CONFIG_RT_USING_CLOCK_TIME issue.

* [docs][clock_time] add clock time documentation

* [docs][clock_time] Update clock time subsystem documentation

- Update device driver index to use correct page reference
- Clarify upper layer responsibilities in architecture overview
- Update README to describe POSIX/libc, Soft RTC, and device driver usage
- Refine architecture diagram with improved layout and color scheme
- Remove obsolete clock_timer.md file

* [kernel][utest] Trim trailing space

* [clock_time] Fix hrtimer wrap handling

* [clock_time] fix the static rt_inline issue

* [clock_time] fix the rt_clock_hrtimer_control result issue</content>
</entry>
<entry>
<title>doxygen: add comments for lwp shared memory APIs</title>
<updated>2025-11-15T06:20:36Z</updated>
<author>
<name>ibvqeibob</name>
<email>2601187225@qq.com</email>
</author>
<published>2025-11-06T02:40:38Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=4e41e700f0b00a874d5d48ed373e5c51cc22245a'/>
<id>urn:sha1:4e41e700f0b00a874d5d48ed373e5c51cc22245a</id>
<content type='text'>
Add Doxygen-style comments for the lwp shared memory public APIs
in components/lwp/lwp_shm.c and the related control structure.
This change is documentation-only and does not modify any runtime
behavior or logic.

Signed-off-by: ibvqeibob &lt;2601187225@qq.com&gt;
</content>
</entry>
<entry>
<title>Fix comment for address_search_head field of lwp structure.</title>
<updated>2025-10-20T03:12:57Z</updated>
<author>
<name>ligr</name>
<email>liguorui1213@163.com</email>
</author>
<published>2025-09-30T08:23:29Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=1ca86c79faff0f1720adc14b931eae072d27bf89'/>
<id>urn:sha1:1ca86c79faff0f1720adc14b931eae072d27bf89</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Align annotations of struct fields.</title>
<updated>2025-10-20T03:12:57Z</updated>
<author>
<name>ligr</name>
<email>liguorui1213@163.com</email>
</author>
<published>2025-09-15T00:34:38Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=77844b7b0778d87c09d27915a84740c412157959'/>
<id>urn:sha1:77844b7b0778d87c09d27915a84740c412157959</id>
<content type='text'>
</content>
</entry>
<entry>
<title>fix structure comments according to doxygen spec.</title>
<updated>2025-10-20T03:12:57Z</updated>
<author>
<name>ligr</name>
<email>liguorui1213@163.com</email>
</author>
<published>2025-09-14T01:41:34Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=3afefd7fddcf561da8c2102d5c3ebfda47ca60fd'/>
<id>urn:sha1:3afefd7fddcf561da8c2102d5c3ebfda47ca60fd</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[components/lwp]add doxygen comment for lwp.c with lwp.h.</title>
<updated>2025-10-20T03:12:57Z</updated>
<author>
<name>ligr</name>
<email>liguorui1213@163.com</email>
</author>
<published>2025-09-12T02:13:14Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=09721bb7a150106d38d48b9e15561f5158be2710'/>
<id>urn:sha1:09721bb7a150106d38d48b9e15561f5158be2710</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[components/lwp]add doxygen comment for lwp futex. (#10763)</title>
<updated>2025-10-04T02:02:21Z</updated>
<author>
<name>Guorui Li</name>
<email>liguorui1213@163.com</email>
</author>
<published>2025-10-04T02:02:21Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=1aef0dba719d9080690ca370605fdee947296dec'/>
<id>urn:sha1:1aef0dba719d9080690ca370605fdee947296dec</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[components/lwp]add doxygen comment for lwp_dbg.c.</title>
<updated>2025-09-26T08:52:46Z</updated>
<author>
<name>ligr</name>
<email>liguorui1213@163.com</email>
</author>
<published>2025-09-23T03:16:12Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=7b8e8c95baea9eb180cb7fedc63bb66e63bd32f0'/>
<id>urn:sha1:7b8e8c95baea9eb180cb7fedc63bb66e63bd32f0</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[components/lwp]add doxygen comment for lwp avl implementation.</title>
<updated>2025-09-25T05:46:21Z</updated>
<author>
<name>ligr</name>
<email>liguorui1213@163.com</email>
</author>
<published>2025-09-22T11:52:32Z</published>
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<id>urn:sha1:0785e224ce58b44d0c870a4c2545fa9fca3211e0</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[components/lwp]add doxygen comment for lwp_tid.</title>
<updated>2025-09-24T10:14:03Z</updated>
<author>
<name>ligr</name>
<email>liguorui1213@163.com</email>
</author>
<published>2025-09-22T00:44:01Z</published>
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<id>urn:sha1:a84e75527d6c0963f866f6cebb88b603f29098f8</id>
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</content>
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