rt-thread.git/components/mm, branch master

[ARCH/RISC-V] Next RISC-V (#10320)

2026-10-17T01:44:26Z

* [libcpu][risc-v] Refactor the RISC-V architecture port Introduce an opt-in unified RISC-V common layer for RV32 and RV64 while keeping existing BSPs on the legacy implementation during migration. - use ARCH_RISCV and ARCH_CPU_64BIT for architecture and XLEN selection - unify context, trap, MMU, cache, timer, SBI, SMP and ISA handling - add PLIC, CLIC, ACLINT, APLIC and IMSIC support - map physical hart IDs to contiguous logical CPU IDs - add T-Head vendor overrides while preserving legacy ports - migrate qemu-virt64-riscv with RV32 and RV64 support - update clock_time, MM, LWP, OFW, PCI and Rust integration Existing BSPs continue using legacy_common or common64 unless they select RT_USING_RISCV_NEW_COMMON. Signed-off-by: GuEe-GUI <2991707448@qq.com> * [libcpu][risc-v] skip disabled CPU nodes in early FDT walk Rbb666 noted that rt_hw_fdt_install_early() walked every /cpus child without checking status, so disabled cores still joined hart registration and MMU capability probing. Skip nodes that are not okay/ok via rt_fdt_device_is_available() before reading reg or mmu-type. Signed-off-by: seteiro * [libcpu][risc-v] Fix per-CPU page table mapping - reuse existing non-leaf page table entries when mapping per-CPU areas - reject leaf entry conflicts instead of overwriting mappings Signed-off-by: GuEe-GUI <2991707448@qq.com> --------- Signed-off-by: GuEe-GUI <2991707448@qq.com> Signed-off-by: seteiro Co-authored-by: seteiro

fix(mm): exclude no-MMU ioremap from MMU builds

2026-08-12T04:54:50Z

feat(dm): support OFW on Cortex-M targets

2026-08-12T04:54:50Z

Add the ARM NVIC PIC driver, no-MMU I/O mapping, built-in FDT support, and Cortex-M CPU hooks required by the native RT-Thread device model.

utest: move mm testcases to components/mm

2026-06-12T06:22:53Z

Signed-off-by: CYFS <2805686936@qq.com>

[MM] Update MM System (#10989)

2025-12-03T13:49:52Z

* [MM] Fixup MM 1. Fixup some LOG_D args. 2. Stop installing page when `rt_aspace_map_phy` fail. * [MM] Support page MPR dynamic size For RISC-V or dynamic address space arch in the future. Signed-off-by: GuEe-GUI <2991707448@qq.com>

Reorganize Group names in build system for clarity and IDE integration #10923

2025-11-16T03:40:53Z

utest: UTEST_MM_API_TC -> RT_UTEST_MM_API

2025-10-15T01:43:16Z

Signed-off-by: Chen Wang

[mm]修复unmap内存时遗漏刷新地址转换表的问题，避免dcache(PIPT)出错

2025-03-10T14:32:32Z

feat: improve Kconfig structure on MM

2025-02-25T03:26:30Z

Signed-off-by: Shell

feat: mm: page poison debugging and assertion enhancements

2025-02-25T03:26:30Z

This commit introduces a page poison debugging mechanism and additional assertions for memory management, improving system maintainability and debugging capabilities. The changes aim to detect illegal memory usage early and provide better clarity in managing page allocations. Changes: - Added `RT_DEBUGGING_PAGE_POISON` option to enable memory usage tracing. - Introduced a page poisoner for detecting illegal memory usage. - Implemented region-based memory tracking using bitmaps. - Enhanced spinlock protection for memory management operations. - Fixed several assertion checks for memory safety. - Renamed macros for consistency (`FLOOR` to `CEIL`). - Refined memory allocation and deallocation logic to include poisoning. - Updated Kconfig to add configurable `RT_PAGE_MAX_ORDER` and poison debugging. - Improved debugging outputs for page regions and memory operations. Signed-off-by: Shell