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<title>rt-thread.git/components/net, branch v5.0.x</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/components/net?h=v5.0.x</id>
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<updated>2023-03-11T04:21:31Z</updated>
<entry>
<title>[GD32]add gd32470z-lckfb (#7022)</title>
<updated>2023-03-11T04:21:31Z</updated>
<author>
<name>yuanzihao</name>
<email>y@yzh.email</email>
</author>
<published>2023-03-11T04:21:31Z</published>
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<id>urn:sha1:23786ee481698063b64d8dff37c7ac6e4351e406</id>
<content type='text'>
* --复制gd32450z-eval 作为立创梁山派 gd32470z-lckfb的模板进行移植
* -修改模板keil工程的配置，IROM需要注意总共为1024k，分为Code  area 和Data area  ，IRAM1为 ： 512K-64K=448K=458752=0x70000。
-重新用ENV生成编译固件
片上SRAM可分为4块，分别为SRAM0（112KB）、SRAM1（16KB）、SRAM2（64KB）和TCMSRAM（64KB）。SRAM0、SRAM1和SRAM2可以被所有的AHB主机访问，然而，TCMSRAM（紧耦合存储器SRAM）只可被Cortex ® -M4内核的数据总线访问。BKPSRAM（备份SRAM）应用于备份域，即使当VDD供电电源掉电时，该SRAM仍可保持其内容。附加SRAM（ADDSRAM）只在一些特殊的GD32F4xx器件中可用。由于采用AHB互联矩阵，上述SRAM块可以同时被不同的AHB主机访问，例如，即使CPU正在访问SRAM0，USBHS也可以访问SRAM1。

* -修改IAR编译的链接脚本
* --修改Flash和RAM大小
-RAM大小为448k是因为512K-64K=448K，其中后面的64K为TCMSRAM（紧耦合存储器SRAM）只可被Cortex ® -M4内核的数据总线访问，先不要乱分配
* -修改MDK链接脚本
* -修改board.h
* -修改MCU型号
* -Finsh控制台和LED1闪灯程序工作正常，串口控制台名称错误，从uart改为uart0
-Scons正常生成工程
* -发现GD32固件库当前没有240Mhz的时钟配置，将固件库升级为GD32F4xx_Firmware_Library_V3.0.3-发布时间为2023-01-04
* -修改bsp/gd32/arm/gd32407v-start/board/SConscript文件
* -修改led1和change logs
* -按照提交规范使能 One ELF Section per Function（MDK） 并用scons重新生成工程
* -发现整个GD32的IAR模板工程template.eww 是没有的，所以当前是不支持IAR开发的，需要后面学习一下IAR使用再实现了。
* -使用formatting源码格式化工具跑一边gd32470z-lckfb目录
* -使用formatting源码格式化工具跑一遍[components/net/netdev/src/netdev.c]
-三个月前的提交多了几个空格</content>
</entry>
<entry>
<title>[net] fix LWIP_HOOK_IP4_ROUTE_SRC define</title>
<updated>2023-03-11T00:29:01Z</updated>
<author>
<name>guozhanxin</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2023-03-10T08:31:57Z</published>
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<id>urn:sha1:abfaa4bc4eea9a78189e03580ca24c84eb1b1369</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Fix net (#7034)</title>
<updated>2023-03-10T08:16:41Z</updated>
<author>
<name>geniusgogo</name>
<email>2041245+geniusgogo@users.noreply.github.com</email>
</author>
<published>2023-03-10T08:16:41Z</published>
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<id>urn:sha1:e29dfb75ca3b625e2203b385ba99b359089d3968</id>
<content type='text'>
* fix LWIP_HOOK_IP4_ROUTE_SRC.

* fix netdev ping select network card.</content>
</entry>
<entry>
<title>[Fix]:fix at_server.c link failed when using ac6</title>
<updated>2023-03-04T00:04:43Z</updated>
<author>
<name>betesla</name>
<email>betesla@163.com</email>
</author>
<published>2023-03-03T07:44:45Z</published>
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<id>urn:sha1:d1baf1f5b52cd696e07880176eaa58e0ef04de18</id>
<content type='text'>
use __ARMCC_VERSION to replace __CC_ARM</content>
</entry>
<entry>
<title>fixed O_LARGEFILE not defined ci build error.</title>
<updated>2023-02-25T09:07:20Z</updated>
<author>
<name>geniusgogo</name>
<email>xpxyr@sina.com</email>
</author>
<published>2023-02-25T08:20:25Z</published>
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<id>urn:sha1:a53367ac08e43520d67458a52956f191cc3f1194</id>
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</content>
</entry>
<entry>
<title>fix inet_ioctlsocket set O_LARGEFILE flag by musl.</title>
<updated>2023-02-25T09:07:20Z</updated>
<author>
<name>geniusgogo</name>
<email>xpxyr@sina.com</email>
</author>
<published>2023-02-24T13:02:04Z</published>
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<id>urn:sha1:53afeda538b381bba1eb17950d3afb3e82476940</id>
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</content>
</entry>
<entry>
<title>[lwIP] apply AF_UNIX feature (#6954)</title>
<updated>2023-02-23T04:08:57Z</updated>
<author>
<name>guo</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2023-02-23T04:08:57Z</published>
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<id>urn:sha1:52cb2f0b7efb29176bf4011adfe4d44c4b085f21</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[rtdef] use lower-case to define attributes (#6728)</title>
<updated>2022-12-11T18:12:03Z</updated>
<author>
<name>Man, Jianting (Meco)</name>
<email>920369182@qq.com</email>
</author>
<published>2022-12-11T18:12:03Z</published>
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<id>urn:sha1:99bdf978d7fe4ec18ed50a639e15b254825c871b</id>
<content type='text'>
* [rtdef] rename RT_WEAK attribute as rt_weak

* [rtdef] rename RT_USED attribute as rt_used

* [rtdef] rename RT_SECTION attribute as rt_section

* [rtdef] rename ALIGN attribute as rt_align

* [legacy] add RT_USED ALIGN RT_SECTION RT_WEAK as legacy support</content>
</entry>
<entry>
<title>[lwIP] fix lwip sem/mutex valid issue.</title>
<updated>2022-12-03T19:21:06Z</updated>
<author>
<name>bernard</name>
<email>bernard.xiong@rt-thread.com</email>
</author>
<published>2022-12-03T07:39:08Z</published>
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<id>urn:sha1:c53d9da22e5f85e220e7176b0e30a4ca239c52da</id>
<content type='text'>
</content>
</entry>
<entry>
<title>sync branch rt-smart. (#6641)</title>
<updated>2022-12-03T04:07:44Z</updated>
<author>
<name>guo</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-12-03T04:07:44Z</published>
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<id>urn:sha1:ecf2d8215961ca7c539132b62a72df6072cc3e14</id>
<content type='text'>
* Synchronize the code of the rt mart branch to the master branch.
  * TTY device
  * Add lwP code from rt-smart
  * Add vnode in DFS, but DFS will be re-write for rt-smart
  * There are three libcpu for rt-smart:
    * arm/cortex-a, arm/aarch64
    * riscv64

Co-authored-by: Rbb666 &lt;zhangbingru@rt-thread.com&gt;
Co-authored-by: zhkag &lt;zhkag@foxmail.com&gt;</content>
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