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<title>rt-thread.git/examples/utest/testcases/kernel, branch v5.0.x</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/examples/utest/testcases/kernel?h=v5.0.x</id>
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<updated>2023-03-30T03:06:21Z</updated>
<entry>
<title>[utest][atomic]添加返回值测试 (#7124)</title>
<updated>2023-03-30T03:06:21Z</updated>
<author>
<name>Yaochenger</name>
<email>75192526+Yaochenger@users.noreply.github.com</email>
</author>
<published>2023-03-30T03:06:21Z</published>
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<id>urn:sha1:38eb3fc40f817ea1dce5223a9bac0d2d3b578bd2</id>
<content type='text'>
* [utest][atomic]添加返回值测试
</content>
</entry>
<entry>
<title>[atomic]添加arm与risc-v下的常用原子操作函数 (#7053)</title>
<updated>2023-03-23T12:06:50Z</updated>
<author>
<name>Yaochenger</name>
<email>75192526+Yaochenger@users.noreply.github.com</email>
</author>
<published>2023-03-23T12:06:50Z</published>
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<id>urn:sha1:de4f23748212dbba7d0250fdac3ae583e74fcbed</id>
<content type='text'>
* Update Kconfig
* Update trap_gcc.S
* Update bsp/hifive1/drivers/SConscript

Co-authored-by: Man, Jianting (Meco) &lt;920369182@qq.com&gt;
* Update SConscript
* [atomic]提交一份arm与risc-v架构下的常用原子操作函数
* 修改变量类型
* 更新rtatomic.h与atomic_port.c
* 更新rt-thread\libcpu\arm\common\atomic_port.c
* 更新include/rtatomic.h与libcpu/arm/common/SConscript
* 更新include/rtatomic.h
* 修正格式与Kconfig
* 修正格式与文件结构

* 规范文件格式与文件重命名
* 添加测试用例与CI
* 添加函数声明
* 修改virt64/SConscript 添加atomic_riscv.c
  * 1.规范代码风格
  * 2.添加RISC-V64原子指令支持 解决在RV64下编译器将32-bit运算结果扩展为64-bit 导致判断错误
* 添加C11标准库原子操作测试

---------

Co-authored-by: Man, Jianting (Meco) &lt;920369182@qq.com&gt;</content>
</entry>
<entry>
<title>[errno code][-RT_ERROR] fix that use RT_ERROR without -</title>
<updated>2023-03-20T04:06:16Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2023-03-17T04:12:16Z</published>
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<id>urn:sha1:0f461e870c481a24ce2690cca1949706bb80f9e7</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[ci] fix build error.</title>
<updated>2023-02-13T02:56:17Z</updated>
<author>
<name>guozhanxin</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2023-02-13T02:22:02Z</published>
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<id>urn:sha1:03bcd0701cbd1c8e4aeab5f5f2e5548e24167fee</id>
<content type='text'>
</content>
</entry>
<entry>
<title>format Kconfig and sconscript</title>
<updated>2023-01-09T03:52:13Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2023-01-09T02:14:23Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=9bc68d26a446158aad13f910fa5a2b8b09febec1'/>
<id>urn:sha1:9bc68d26a446158aad13f910fa5a2b8b09febec1</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[rtdef] use lower-case to define attributes (#6728)</title>
<updated>2022-12-11T18:12:03Z</updated>
<author>
<name>Man, Jianting (Meco)</name>
<email>920369182@qq.com</email>
</author>
<published>2022-12-11T18:12:03Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=99bdf978d7fe4ec18ed50a639e15b254825c871b'/>
<id>urn:sha1:99bdf978d7fe4ec18ed50a639e15b254825c871b</id>
<content type='text'>
* [rtdef] rename RT_WEAK attribute as rt_weak

* [rtdef] rename RT_USED attribute as rt_used

* [rtdef] rename RT_SECTION attribute as rt_section

* [rtdef] rename ALIGN attribute as rt_align

* [legacy] add RT_USED ALIGN RT_SECTION RT_WEAK as legacy support</content>
</entry>
<entry>
<title>sync branch rt-smart. (#6641)</title>
<updated>2022-12-03T04:07:44Z</updated>
<author>
<name>guo</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-12-03T04:07:44Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=ecf2d8215961ca7c539132b62a72df6072cc3e14'/>
<id>urn:sha1:ecf2d8215961ca7c539132b62a72df6072cc3e14</id>
<content type='text'>
* Synchronize the code of the rt mart branch to the master branch.
  * TTY device
  * Add lwP code from rt-smart
  * Add vnode in DFS, but DFS will be re-write for rt-smart
  * There are three libcpu for rt-smart:
    * arm/cortex-a, arm/aarch64
    * riscv64

Co-authored-by: Rbb666 &lt;zhangbingru@rt-thread.com&gt;
Co-authored-by: zhkag &lt;zhkag@foxmail.com&gt;</content>
</entry>
<entry>
<title>修复 riscv64 messagequeue_tc 报错</title>
<updated>2022-11-30T02:08:22Z</updated>
<author>
<name>zhkag</name>
<email>zhkag@foxmail.com</email>
</author>
<published>2022-11-29T02:02:40Z</published>
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<id>urn:sha1:cf221f45d7701c653cee0e95af47869258e1fd55</id>
<content type='text'>
</content>
</entry>
<entry>
<title>expand mq test stack size to fix overstack problem during utest.</title>
<updated>2022-10-28T01:11:49Z</updated>
<author>
<name>fan.ji</name>
<email>fan.ji@weiheng-tech.com</email>
</author>
<published>2022-10-27T02:38:23Z</published>
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<id>urn:sha1:b1beed20ae1034ad8b87594dfd1aa778f91f2d2e</id>
<content type='text'>
Signed-off-by: fan.ji &lt;fan.ji@weiheng-tech.com&gt;
</content>
</entry>
<entry>
<title>fix test_thread_yield fail bug in multiple utest loop case.</title>
<updated>2022-10-28T01:10:43Z</updated>
<author>
<name>fan.ji</name>
<email>fan.ji@weiheng-tech.com</email>
</author>
<published>2022-10-27T02:56:39Z</published>
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<id>urn:sha1:dff06ff60371763dca179e0d800fe6561380411f</id>
<content type='text'>
Signed-off-by: fan.ji &lt;fan.ji@weiheng-tech.com&gt;
</content>
</entry>
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