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<title>rt-thread.git/libcpu/aarch64/common/cpuport.h, branch v5.0.x</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/libcpu/aarch64/common/cpuport.h?h=v5.0.x</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/libcpu/aarch64/common/cpuport.h?h=v5.0.x'/>
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<updated>2023-02-21T00:48:49Z</updated>
<entry>
<title>[fixup] add cache maintenance ops;</title>
<updated>2023-02-21T00:48:49Z</updated>
<author>
<name>wangxiaoyao</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-02-20T05:48:00Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=484a0d602e8b571a9d8186d38c8b136abc4ccfc9'/>
<id>urn:sha1:484a0d602e8b571a9d8186d38c8b136abc4ccfc9</id>
<content type='text'>
fix bugs on cache maintenance when starting user app
</content>
</entry>
<entry>
<title>[rt-smart] kernel virtual memory management layer (#6809)</title>
<updated>2023-01-09T02:08:55Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-01-09T02:08:55Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=7450ef6c4d71f992444d27f4a26c16f813ed8e55'/>
<id>urn:sha1:7450ef6c4d71f992444d27f4a26c16f813ed8e55</id>
<content type='text'>
synchronize virtual memory system works.
adding kernel virtual memory management layer for page-based MMU enabled architecture
porting libcpu MMU codes
porting lwp memory related codes</content>
</entry>
<entry>
<title>[smart/aarch64] code sync (#6750)</title>
<updated>2022-12-20T09:49:37Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2022-12-20T09:49:37Z</published>
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<id>urn:sha1:e8504c7cf1d03c07608e2197eaef728a6aecde7a</id>
<content type='text'>
* [smart/aarch64] sync aarch64</content>
</entry>
<entry>
<title>sync branch rt-smart. (#6641)</title>
<updated>2022-12-03T04:07:44Z</updated>
<author>
<name>guo</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-12-03T04:07:44Z</published>
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<id>urn:sha1:ecf2d8215961ca7c539132b62a72df6072cc3e14</id>
<content type='text'>
* Synchronize the code of the rt mart branch to the master branch.
  * TTY device
  * Add lwP code from rt-smart
  * Add vnode in DFS, but DFS will be re-write for rt-smart
  * There are three libcpu for rt-smart:
    * arm/cortex-a, arm/aarch64
    * riscv64

Co-authored-by: Rbb666 &lt;zhangbingru@rt-thread.com&gt;
Co-authored-by: zhkag &lt;zhkag@foxmail.com&gt;</content>
</entry>
<entry>
<title>[libcpu/aarch64] add smp support</title>
<updated>2022-01-08T10:24:02Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2022-01-07T05:49:06Z</published>
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<id>urn:sha1:353f717037b57f663ddce9447fd05700f3087a66</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Merge AArch64 libcpu and add some drivers for their bsps</title>
<updated>2021-09-26T07:01:59Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2021-09-22T09:57:45Z</published>
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<id>urn:sha1:740cd9dfb013a26cb5a9106a717deedd4478eff5</id>
<content type='text'>
</content>
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