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<title>rt-thread.git/libcpu/aarch64/common/vector_gcc.S, branch v5.2.1</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/libcpu/aarch64/common/vector_gcc.S?h=v5.2.1</id>
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<updated>2024-09-20T03:02:39Z</updated>
<entry>
<title>feat: smart: user space context optimization</title>
<updated>2024-09-20T03:02:39Z</updated>
<author>
<name>Shell</name>
<email>smokewood@qq.com</email>
</author>
<published>2024-09-14T02:52:46Z</published>
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<id>urn:sha1:9a27de92ae86dd23581e8294fac95353c9eb0145</id>
<content type='text'>
This patch optimizes the user-space context handling in the ARM64
architecture, specifically improving how the context is saved and
restored during system calls and interrupts. The changes make the
code more efficient and easier to maintain, while ensuring proper
preservation of user context during system transitions.

Changes:
- Introduced a parameter for context saving to improve flexibility.
- Replaced hardcoded stack pointer operations with frame-relative
  references for better readability and code reuse.
- Simplified context restoration, removing redundant operations like
  loading/storing floating-point registers.

Signed-off-by: Shell &lt;smokewood@qq.com&gt;
</content>
</entry>
<entry>
<title>feat: arm64: generic implementation of vector irq (#9336)</title>
<updated>2024-08-27T04:45:12Z</updated>
<author>
<name>Shell</name>
<email>smokewood@qq.com</email>
</author>
<published>2024-08-27T04:45:12Z</published>
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<id>urn:sha1:fd496e4cc43f80486b14d0d1b0cf2816285f91d9</id>
<content type='text'>
feat: overall implementation of vector irq

This patch generalize the irq handling on up/mp system by adding the
`rt_hw_irq_exit()` &amp; `rt_hw_vector_irq_sched()` API.

Changes:
- Added `rt_hw_irq_exit()` and `rt_hw_vector_irq_sched()` APIs for unified IRQ management.
- Refactored assembly code for both UP and MP systems to use the new IRQ handling flow.
- Removed redundant code and optimized exception handling paths.

Signed-off-by: Shell &lt;smokewood@qq.com&gt;</content>
</entry>
<entry>
<title>[format] cleanup libcpu/aarch64 (#8950)</title>
<updated>2024-06-27T16:23:09Z</updated>
<author>
<name>Shell</name>
<email>smokewood@qq.com</email>
</author>
<published>2024-06-27T16:23:09Z</published>
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<id>urn:sha1:90917cc75af9406834c14fd25140405ba6f72d6d</id>
<content type='text'>
* [dfs] fixup compiler warning

Signed-off-by: Shell &lt;smokewood@qq.com&gt;

* [format] libcpu/arm64: separate context switching codes

Signed-off-by: Shell &lt;smokewood@qq.com&gt;

* [format] libcpu/arm64: separate vector

Signed-off-by: Shell &lt;smokewood@qq.com&gt;

* [format] libcpu/arm64: separate context_gcc.S

Signed-off-by: Shell &lt;smokewood@qq.com&gt;

* [format] libcpu/arm64: moving headers to include directory

Signed-off-by: Shell &lt;smokewood@qq.com&gt;

* style: replace tab with space

---------

Signed-off-by: Shell &lt;smokewood@qq.com&gt;</content>
</entry>
<entry>
<title>[smart/aarch64] code sync (#6750)</title>
<updated>2022-12-20T09:49:37Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2022-12-20T09:49:37Z</published>
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<id>urn:sha1:e8504c7cf1d03c07608e2197eaef728a6aecde7a</id>
<content type='text'>
* [smart/aarch64] sync aarch64</content>
</entry>
<entry>
<title>[libcpu/aarch64] disable irq/fiq when switch thread (#5605)</title>
<updated>2022-02-21T15:24:51Z</updated>
<author>
<name>GUI</name>
<email>39894654+GuEe-GUI@users.noreply.github.com</email>
</author>
<published>2022-02-21T15:24:51Z</published>
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<id>urn:sha1:9b6e75f90b1e56c075eb2bb2566dfd6843a2b5e2</id>
<content type='text'>
* [libcpu/aarch64] add smp support

* [libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2

* [libcpu/aarch64] disable irq/fiq when switch thread</content>
</entry>
<entry>
<title>[libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2 (#5601)</title>
<updated>2022-02-16T17:00:29Z</updated>
<author>
<name>GUI</name>
<email>39894654+GuEe-GUI@users.noreply.github.com</email>
</author>
<published>2022-02-16T17:00:29Z</published>
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<id>urn:sha1:85dc9bd4a6e798c74f16a87bc91191907dfdbaf7</id>
<content type='text'>
* [libcpu/aarch64] add smp support
* [libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2</content>
</entry>
<entry>
<title>[asm] 解决tab和空格混用的问题</title>
<updated>2022-01-20T12:57:35Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2022-01-18T05:35:13Z</published>
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<id>urn:sha1:563e49890c597c53adba954063c37b03644c5c69</id>
<content type='text'>
</content>
</entry>
<entry>
<title>fixup .bss size define in link.lds and set spsel=1 in aarch64</title>
<updated>2021-11-30T03:14:17Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2021-11-30T02:32:23Z</published>
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<id>urn:sha1:efbdbc2636abf25d0836d58a666b91d61b99bf80</id>
<content type='text'>
</content>
</entry>
<entry>
<title>add raspi4 bsp</title>
<updated>2020-04-16T08:44:14Z</updated>
<author>
<name>bigmagic</name>
<email>zhaofujin@rt-thread.com</email>
</author>
<published>2020-04-16T08:10:57Z</published>
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<id>urn:sha1:fb8c7829a8a861f9837912ecf926899f48349967</id>
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</content>
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