rt-thread.git/libcpu/aarch64/cortex-a, branch serialX-dev Unnamed repository; edit this file 'description' to name the repository. http://cgit.235523.xyz/rt-thread.git/atom/libcpu/aarch64/cortex-a?h=serialX-dev 2023-02-21T00:48:49Z [fixup] add cache maintenance ops; 2023-02-21T00:48:49Z wangxiaoyao wangxiaoyao@rt-thread.com 2023-02-20T05:48:00Z urn:sha1:484a0d602e8b571a9d8186d38c8b136abc4ccfc9 fix bugs on cache maintenance when starting user app [rt-smart] PV_OFFSET as a variable (#6904) 2023-02-14T15:08:32Z Shell wangxiaoyao@rt-thread.com 2023-02-14T15:08:32Z urn:sha1:2d0974908659bd41d748e69fac0166c37b15cb02 * [rt-smart/mem] remove pv_offset * [rt-smart] list kernel space command * [rt-smart] restore ioremap region * [revert] restore kernel space isolation * [rt-smart/pv_off] code format * [rt-smart] add get_pvoff() * [pvoffset] pvoff as constant for C codes * [pvoff] pvoff as interfaces [rt-smart] kernel virtual memory management layer (#6809) 2023-01-09T02:08:55Z Shell wangxiaoyao@rt-thread.com 2023-01-09T02:08:55Z urn:sha1:7450ef6c4d71f992444d27f4a26c16f813ed8e55 synchronize virtual memory system works. adding kernel virtual memory management layer for page-based MMU enabled architecture porting libcpu MMU codes porting lwp memory related codes [smart/aarch64] code sync (#6750) 2022-12-20T09:49:37Z Shell wangxiaoyao@rt-thread.com 2022-12-20T09:49:37Z urn:sha1:e8504c7cf1d03c07608e2197eaef728a6aecde7a * [smart/aarch64] sync aarch64 [libcpu/aarch64] add gicv3 support and bsp/rockchip/rk3568 (#5722) 2022-03-29T03:08:25Z GUI 39894654+GuEe-GUI@users.noreply.github.com 2022-03-29T03:08:25Z urn:sha1:f587a55bc2006f4316383425d518b734e42bb4a2 * [libcpu/aarch64] add smp support * [libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2 * [libcpu/aarch64] disable irq/fiq when switch thread * [libcpu/aarch64] add gtimer frq set and stack align * [libcpu/aarch64] add gicv3 support and bsp/rockchip/rk3568 [libcpu/aarch64] add gtimer frq set and stack align (#5642) 2022-03-07T14:41:56Z GUI 39894654+GuEe-GUI@users.noreply.github.com 2022-03-07T14:41:56Z urn:sha1:0a8dd10b0bb73a8c52b7c9132bdb9ce8202a18bb * [libcpu/aarch64] add smp support * [libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2 * [libcpu/aarch64] disable irq/fiq when switch thread * [libcpu/aarch64] add gtimer frq set and stack align [libcpu/aarch64] add smp support 2022-01-08T10:24:02Z GuEe-GUI 2991707448@qq.com 2022-01-07T05:49:06Z urn:sha1:353f717037b57f663ddce9447fd05700f3087a66 fixup .bss size define in link.lds and set spsel=1 in aarch64 2021-11-30T03:14:17Z GuEe-GUI 2991707448@qq.com 2021-11-30T02:32:23Z urn:sha1:efbdbc2636abf25d0836d58a666b91d61b99bf80 Merge AArch64 libcpu and add some drivers for their bsps 2021-09-26T07:01:59Z GuEe-GUI 2991707448@qq.com 2021-09-22T09:57:45Z urn:sha1:740cd9dfb013a26cb5a9106a717deedd4478eff5