rt-thread.git/libcpu/aarch64, branch riscv64

[format] cleanup libcpu/aarch64 (#8950)

2024-06-27T16:23:09Z

* [dfs] fixup compiler warning Signed-off-by: Shell * [format] libcpu/arm64: separate context switching codes Signed-off-by: Shell * [format] libcpu/arm64: separate vector Signed-off-by: Shell * [format] libcpu/arm64: separate context_gcc.S Signed-off-by: Shell * [format] libcpu/arm64: moving headers to include directory Signed-off-by: Shell * style: replace tab with space --------- Signed-off-by: Shell

[libcpu][aarch64]mmu log fixup (#9078)

2024-06-26T06:37:05Z

mmu log fixup

[libcpu][aarch64]memory setup using memblock (#9092)

2024-06-26T06:36:49Z

* memory setup using memblock * map pages later

[bsp/phytium]c++支持，gpio，qspi驱动修改 (#9059)

2024-06-16T07:42:37Z

* GPIO驱动与QSPI驱动适配 * C++支持 * update --------- Co-authored-by: 张衍

[kservice] Enhance support for backtrace service (#9037)

2024-06-13T00:55:53Z

[feat] Enhance support for backtrace service rt_backtrace_formatted_print() and rt_backtrace_to_buffer() to help debug routines. Also, following modification are included: - make rt_backtrace_frame patchable with weak attr - replace lwp backtrace with sync output Signed-off-by: Shell

[libcpu] arm64: implement cpuid get by assembly (#9052)

2024-06-11T09:21:47Z

[mm] precise & readable mm fault type (#9047)

2024-06-07T13:34:03Z

* [smart] fixup: precise mm fault type Also, fixup arm64 read access fault * arm64: using meaningful macro on trap * fixup: renaming macro

[arm64] add hw thread self (#8942)

2024-05-28T06:27:55Z

* [libcpu] arm64: Add hardware thread_self support This patch introduces hardware-based thread self-identification for the AArch64 architecture. It optimizes thread management by using hardware registers to store and access the current thread's pointer, reducing overhead and improving overall performance. Changes include: - Added `ARCH_USING_HW_THREAD_SELF` configuration option. - Modified `rtdef.h`, `rtsched.h` to conditionally include `critical_switch_flag` based on the new config. - Updated context management in `context_gcc.S`, `cpuport.h` to support hardware-based thread self. - Enhanced `scheduler_mp.c` and `thread.c` to leverage the new hardware thread self feature. These modifications ensure better scheduling and thread handling, particularly in multi-core environments, by minimizing the software overhead associated with thread management. Signed-off-by: Shell * fixup: address suggestion * fixup: rt_current_thread as global * scheduler: add cpu object for UP scheduler Also, maintain the rt_current_thread in cpu object on UP scheduler. --------- Signed-off-by: Shell

[libcpu/arm64] add C11 atomic ticket spinlock (#8882)

2024-05-16T07:45:12Z

* [libcpu/arm64] add C11 atomic ticket spinlock Replace the former implementation of flag-based spinlock which is unfair Besides, C11 atomic implementation is more readable (it's C anyway), and maintainable. Cause toolchain can use their builtin optimization and tune for different micro-architectures. For example armv8.5 introduces a better instruction. The compiler can help with that when it knows your target platform in support of it. Signed-off-by: Shell * fixup: RT_CPUS_NR --------- Signed-off-by: Shell

[smart] fixup arm64 aspace switch (#8925)

2024-05-10T01:17:19Z

* [smart] fixup arm64 aspace switch Signed-off-by: Shell * fixup: arm add arch_kernel_mmu_table_get --------- Signed-off-by: Shell