<feed xmlns='http://www.w3.org/2005/Atom'>
<title>rt-thread.git/libcpu/aarch64, branch v4.1.1-beta</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/libcpu/aarch64?h=v4.1.1-beta</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/libcpu/aarch64?h=v4.1.1-beta'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/'/>
<updated>2022-04-20T06:22:43Z</updated>
<entry>
<title>uniform code writing-disable interrupt</title>
<updated>2022-04-20T06:22:43Z</updated>
<author>
<name>thewon86</name>
<email>zhongyong0104@sina.com</email>
</author>
<published>2022-04-20T02:56:11Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=f5b0bfd3f4f450424b5bc1f084959d0436c8a6e6'/>
<id>urn:sha1:f5b0bfd3f4f450424b5bc1f084959d0436c8a6e6</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu/aarch64] add gicv3 support and bsp/rockchip/rk3568 (#5722)</title>
<updated>2022-03-29T03:08:25Z</updated>
<author>
<name>GUI</name>
<email>39894654+GuEe-GUI@users.noreply.github.com</email>
</author>
<published>2022-03-29T03:08:25Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=f587a55bc2006f4316383425d518b734e42bb4a2'/>
<id>urn:sha1:f587a55bc2006f4316383425d518b734e42bb4a2</id>
<content type='text'>
* [libcpu/aarch64] add smp support

* [libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2

* [libcpu/aarch64] disable irq/fiq when switch thread

* [libcpu/aarch64] add gtimer frq set and stack align

* [libcpu/aarch64] add gicv3 support and bsp/rockchip/rk3568</content>
</entry>
<entry>
<title>[libcpu/aarch64] add gtimer frq set and stack align (#5642)</title>
<updated>2022-03-07T14:41:56Z</updated>
<author>
<name>GUI</name>
<email>39894654+GuEe-GUI@users.noreply.github.com</email>
</author>
<published>2022-03-07T14:41:56Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=0a8dd10b0bb73a8c52b7c9132bdb9ce8202a18bb'/>
<id>urn:sha1:0a8dd10b0bb73a8c52b7c9132bdb9ce8202a18bb</id>
<content type='text'>
* [libcpu/aarch64] add smp support

* [libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2

* [libcpu/aarch64] disable irq/fiq when switch thread

* [libcpu/aarch64] add gtimer frq set and stack align</content>
</entry>
<entry>
<title>[libcpu/aarch64] disable irq/fiq when switch thread (#5605)</title>
<updated>2022-02-21T15:24:51Z</updated>
<author>
<name>GUI</name>
<email>39894654+GuEe-GUI@users.noreply.github.com</email>
</author>
<published>2022-02-21T15:24:51Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=9b6e75f90b1e56c075eb2bb2566dfd6843a2b5e2'/>
<id>urn:sha1:9b6e75f90b1e56c075eb2bb2566dfd6843a2b5e2</id>
<content type='text'>
* [libcpu/aarch64] add smp support

* [libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2

* [libcpu/aarch64] disable irq/fiq when switch thread</content>
</entry>
<entry>
<title>[libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2 (#5601)</title>
<updated>2022-02-16T17:00:29Z</updated>
<author>
<name>GUI</name>
<email>39894654+GuEe-GUI@users.noreply.github.com</email>
</author>
<published>2022-02-16T17:00:29Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=85dc9bd4a6e798c74f16a87bc91191907dfdbaf7'/>
<id>urn:sha1:85dc9bd4a6e798c74f16a87bc91191907dfdbaf7</id>
<content type='text'>
* [libcpu/aarch64] add smp support
* [libcpu/aarch64] rt_hw_trap_irq get irq instead of iar when using gicv2</content>
</entry>
<entry>
<title>[asm] 解决tab和空格混用的问题</title>
<updated>2022-01-20T12:57:35Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2022-01-18T05:35:13Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=563e49890c597c53adba954063c37b03644c5c69'/>
<id>urn:sha1:563e49890c597c53adba954063c37b03644c5c69</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu/aarch64] add smp support</title>
<updated>2022-01-08T10:24:02Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2022-01-07T05:49:06Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=353f717037b57f663ddce9447fd05700f3087a66'/>
<id>urn:sha1:353f717037b57f663ddce9447fd05700f3087a66</id>
<content type='text'>
</content>
</entry>
<entry>
<title>fixup .bss size define in link.lds and set spsel=1 in aarch64</title>
<updated>2021-11-30T03:14:17Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2021-11-30T02:32:23Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=efbdbc2636abf25d0836d58a666b91d61b99bf80'/>
<id>urn:sha1:efbdbc2636abf25d0836d58a666b91d61b99bf80</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Merge AArch64 libcpu and add some drivers for their bsps</title>
<updated>2021-09-26T07:01:59Z</updated>
<author>
<name>GuEe-GUI</name>
<email>2991707448@qq.com</email>
</author>
<published>2021-09-22T09:57:45Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=740cd9dfb013a26cb5a9106a717deedd4478eff5'/>
<id>urn:sha1:740cd9dfb013a26cb5a9106a717deedd4478eff5</id>
<content type='text'>
</content>
</entry>
<entry>
<title>FINSH_USING_BUILT_IN_COMMANDS改MSH_USING_BUILT_IN_COMMANDS</title>
<updated>2021-08-28T20:48:08Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2021-08-28T20:48:08Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=1997113fbca8894dcaad75a6fa4e7b42396a4031'/>
<id>urn:sha1:1997113fbca8894dcaad75a6fa4e7b42396a4031</id>
<content type='text'>
</content>
</entry>
</feed>
