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<title>rt-thread.git/libcpu/arm/AT91SAM7X, branch v3.1.5</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
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<updated>2021-05-27T09:33:03Z</updated>
<entry>
<title>[lts 3,1,x] format codes</title>
<updated>2021-05-27T09:33:03Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2021-05-27T09:33:03Z</published>
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<id>urn:sha1:03f4d40e30f3c94e1db0b3a65b3610dee695694a</id>
<content type='text'>
</content>
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<entry>
<title>Sync from master (0889bafda8e03c6809d43ec87ee28b940efb28aa).</title>
<updated>2019-01-19T10:09:18Z</updated>
<author>
<name>armink</name>
<email>armink.ztl@gmail.com</email>
</author>
<published>2019-01-19T10:09:18Z</published>
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<id>urn:sha1:0e977c00c4d0ad4a2b8b34491eb1c63f37187a25</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu] Sync to latest version.</title>
<updated>2018-12-28T11:22:33Z</updated>
<author>
<name>armink</name>
<email>armink.ztl@gmail.com</email>
</author>
<published>2018-12-28T11:22:33Z</published>
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<id>urn:sha1:1bc7b8e61b6967b9443cbe85433af82fd340692e</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[license] Change the license of libarm to Apache.</title>
<updated>2018-10-14T17:35:07Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2018-10-14T17:35:07Z</published>
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<id>urn:sha1:7c425408b4335d7af2fefcfa51174735b98037ed</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu]: add 8-byte alignment for arm architecture &amp;&amp; optimize code format</title>
<updated>2017-12-21T08:37:38Z</updated>
<author>
<name>SummerGift</name>
<email>zy_770077@qq.com</email>
</author>
<published>2017-12-21T08:32:35Z</published>
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<id>urn:sha1:fc7a5abc7635a1b37bd9202072f279e9930e5eb5</id>
<content type='text'>
</content>
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<entry>
<title>update AT91SAM7X: Modify the interrupt interface implementations.</title>
<updated>2013-03-31T09:43:09Z</updated>
<author>
<name>aozima</name>
<email>wuyangyong@gmail.com</email>
</author>
<published>2013-03-23T12:13:43Z</published>
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<id>urn:sha1:eab20a99750fbc685492e802ba9c543d1ca6420d</id>
<content type='text'>
</content>
</entry>
<entry>
<title>update to interrupt description</title>
<updated>2013-03-30T00:15:27Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2013-03-30T00:15:27Z</published>
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<id>urn:sha1:608074deafecc96c26e219548a74e73f1f594b6d</id>
<content type='text'>
</content>
</entry>
<entry>
<title>convert end of line</title>
<updated>2013-01-08T13:05:02Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2013-01-08T13:05:02Z</published>
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<id>urn:sha1:72782e920325808bbc58fc2344fc52033479b627</id>
<content type='text'>
</content>
</entry>
<entry>
<title>fix a spelling error</title>
<updated>2011-09-19T04:40:50Z</updated>
<author>
<name>dzzxzz</name>
<email>dzzxzz@gmail.com</email>
</author>
<published>2011-09-19T04:40:50Z</published>
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<id>urn:sha1:865c1d4df0f416bd8b60cff71320ac940f0241e2</id>
<content type='text'>
rt_thread_switch_interrput_flag -&gt; rt_thread_switch_interrupt_flag

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1712 bbd45198-f89e-11dd-88c7-29a3b14d5316
</content>
</entry>
<entry>
<title>start_gcc.s fix: disable interrupt in svc mode, add rw,bss init code.</title>
<updated>2011-06-10T02:52:44Z</updated>
<author>
<name>mbbill@gmail.com</name>
<email>mbbill@gmail.com</email>
</author>
<published>2011-06-10T02:52:44Z</published>
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<id>urn:sha1:0587549c4379ee7bf7ea003a85df4b440c55e542</id>
<content type='text'>
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1481 bbd45198-f89e-11dd-88c7-29a3b14d5316
</content>
</entry>
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