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<title>rt-thread.git/libcpu/arm/arm926, branch v3.1.0</title>
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<updated>2018-06-04T05:34:45Z</updated>
<entry>
<title>[libcpu][arm][arm926] Using C header file to define stack and heap size.</title>
<updated>2018-06-04T05:34:45Z</updated>
<author>
<name>ArdaFu</name>
<email>pengfei.fu@gmail.com</email>
</author>
<published>2018-06-04T05:34:45Z</published>
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<entry>
<title>[libcpu]: add 8-byte alignment for arm architecture &amp;&amp; optimize code format</title>
<updated>2017-12-21T08:37:38Z</updated>
<author>
<name>SummerGift</name>
<email>zy_770077@qq.com</email>
</author>
<published>2017-12-21T08:32:35Z</published>
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<id>urn:sha1:fc7a5abc7635a1b37bd9202072f279e9930e5eb5</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[bsp][at91sam9260] Fix the problem of the finsh function failure by using component initialization.</title>
<updated>2017-10-19T15:46:17Z</updated>
<author>
<name>weety</name>
<email>luohui2320@gmail.com</email>
</author>
<published>2017-10-19T15:46:17Z</published>
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<id>urn:sha1:6085f6826d9c19a9d0c7f3feafbd0a5996d7ec2e</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Align thread stack to 8 byte.</title>
<updated>2015-06-05T11:14:08Z</updated>
<author>
<name>aozima</name>
<email>wuyangyong@gmail.com</email>
</author>
<published>2015-06-05T11:09:13Z</published>
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</content>
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<entry>
<title>implement __user_initial_stackheap</title>
<updated>2015-06-04T04:23:24Z</updated>
<author>
<name>aozima</name>
<email>wuyangyong@gmail.com</email>
</author>
<published>2015-06-04T04:23:24Z</published>
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<entry>
<title>Align stack address to 8 byte.</title>
<updated>2015-06-04T03:59:18Z</updated>
<author>
<name>aozima</name>
<email>wuyangyong@gmail.com</email>
</author>
<published>2015-06-04T03:59:18Z</published>
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<content type='text'>
</content>
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<entry>
<title>[libcpu][arm926] Optimize irq trap code.</title>
<updated>2015-05-04T08:13:43Z</updated>
<author>
<name>ardafu</name>
<email>pengfei.fu@gmail.com</email>
</author>
<published>2015-05-04T08:13:43Z</published>
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<id>urn:sha1:a13132b302c7bdc16cd5b42ad436b023915e6224</id>
<content type='text'>
</content>
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<entry>
<title>[libcpu][arm926] Optimize code</title>
<updated>2015-04-22T03:19:50Z</updated>
<author>
<name>ardafu</name>
<email>pengfei.fu@gmail.com</email>
</author>
<published>2015-04-22T03:19:50Z</published>
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<id>urn:sha1:49fa5c44d7c293e85dc17be2063f1f1c14956f30</id>
<content type='text'>
1. Combine code for IAR and GCC in file mmu.c and cpuport.c
2. Remove remap code in start_xxx.S. User should config MMU to map vector table to visual address 0x0
</content>
</entry>
<entry>
<title>[libcpu][arm926] Remove unused SPSR register PUSH/POP when os switch thread.</title>
<updated>2015-04-16T06:13:43Z</updated>
<author>
<name>ardafu</name>
<email>pengfei.fu@gmail.com</email>
</author>
<published>2015-04-16T06:13:43Z</published>
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<id>urn:sha1:175e357acecdbe86200fdc8a0866716d822ca516</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu][arm926] Define vector table start at BSP/{board}/platform/ assemble INC files.</title>
<updated>2015-04-16T02:35:12Z</updated>
<author>
<name>ardafu</name>
<email>pengfei.fu@gmail.com</email>
</author>
<published>2015-04-16T02:35:12Z</published>
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