<feed xmlns='http://www.w3.org/2005/Atom'>
<title>rt-thread.git/libcpu/arm/armv6, branch v4.0.0</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/libcpu/arm/armv6?h=v4.0.0</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/libcpu/arm/armv6?h=v4.0.0'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/'/>
<updated>2019-01-06T22:09:45Z</updated>
<entry>
<title>[libcpu] Add SConscript in libcpu.</title>
<updated>2019-01-06T22:09:45Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2019-01-06T22:09:45Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=bde47018b8327fb8106c68e84a719a97243a1653'/>
<id>urn:sha1:bde47018b8327fb8106c68e84a719a97243a1653</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[license] Change the license of libarm to Apache.</title>
<updated>2018-10-14T17:35:07Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2018-10-14T17:35:07Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=7c425408b4335d7af2fefcfa51174735b98037ed'/>
<id>urn:sha1:7c425408b4335d7af2fefcfa51174735b98037ed</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu]: add 8-byte alignment for armv6 architecture</title>
<updated>2017-12-21T07:35:48Z</updated>
<author>
<name>SummerGift</name>
<email>zy_770077@qq.com</email>
</author>
<published>2017-12-21T07:35:29Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=336207ad31710b0022be9a9a79e72dde2bf48d67'/>
<id>urn:sha1:336207ad31710b0022be9a9a79e72dde2bf48d67</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu]:optimize code format</title>
<updated>2017-12-21T07:14:23Z</updated>
<author>
<name>SummerGift</name>
<email>zy_770077@qq.com</email>
</author>
<published>2017-12-21T07:13:51Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=a4a85a28da2518be29228bb7c889e63f24f97552'/>
<id>urn:sha1:a4a85a28da2518be29228bb7c889e63f24f97552</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu]:optimize code format</title>
<updated>2017-12-21T06:55:34Z</updated>
<author>
<name>SummerGift</name>
<email>zy_770077@qq.com</email>
</author>
<published>2017-12-21T06:54:54Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=e7b17867596dfcf51061cd03a9960eb33d23a9d2'/>
<id>urn:sha1:e7b17867596dfcf51061cd03a9960eb33d23a9d2</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu]: add 8-byte alignment for armv6 architecture</title>
<updated>2017-12-21T02:13:47Z</updated>
<author>
<name>SummerGift</name>
<email>zy_770077@qq.com</email>
</author>
<published>2017-12-21T02:11:55Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=15715692d231fb7542c18dc1d4ef25eb2571d2d4'/>
<id>urn:sha1:15715692d231fb7542c18dc1d4ef25eb2571d2d4</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu] add volatile for __asm.</title>
<updated>2017-11-22T01:54:36Z</updated>
<author>
<name>SummerGift</name>
<email>zy_770077@qq.com</email>
</author>
<published>2017-11-21T09:18:33Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=eb72d191791c72080bc82e1e274c452265e03c5b'/>
<id>urn:sha1:eb72d191791c72080bc82e1e274c452265e03c5b</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu] add volatile for asm (" mcr   ") or asm (" mrc    ") instruct.</title>
<updated>2017-11-22T01:54:27Z</updated>
<author>
<name>SummerGift</name>
<email>zy_770077@qq.com</email>
</author>
<published>2017-11-21T09:08:49Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=2488624a184fced9df5b2c03c55e1f6db683512e'/>
<id>urn:sha1:2488624a184fced9df5b2c03c55e1f6db683512e</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[BSP] Update VFP code in armv6.</title>
<updated>2016-05-20T06:20:34Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2016-05-20T06:20:34Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=4e95fdff4af680b62bafdf5eca1d381212d6ab27'/>
<id>urn:sha1:4e95fdff4af680b62bafdf5eca1d381212d6ab27</id>
<content type='text'>
committed by FH.
</content>
</entry>
<entry>
<title>[BSP] Enable VFP.</title>
<updated>2016-05-20T04:24:51Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2016-05-20T04:24:51Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=923594c7abfd77054dea1667a460a12c6fb621e3'/>
<id>urn:sha1:923594c7abfd77054dea1667a460a12c6fb621e3</id>
<content type='text'>
committed by FH.
</content>
</entry>
</feed>
