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<title>rt-thread.git/libcpu/arm/cortex-a/start_gcc.S, branch serialX-dev</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/libcpu/arm/cortex-a/start_gcc.S?h=serialX-dev</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/libcpu/arm/cortex-a/start_gcc.S?h=serialX-dev'/>
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<updated>2023-02-14T15:08:32Z</updated>
<entry>
<title>[rt-smart] PV_OFFSET as a variable (#6904)</title>
<updated>2023-02-14T15:08:32Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-02-14T15:08:32Z</published>
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<id>urn:sha1:2d0974908659bd41d748e69fac0166c37b15cb02</id>
<content type='text'>
* [rt-smart/mem] remove pv_offset

* [rt-smart] list kernel space command

* [rt-smart] restore ioremap region

* [revert] restore kernel space isolation

* [rt-smart/pv_off] code format

* [rt-smart] add get_pvoff()

* [pvoffset] pvoff as constant for C codes

* [pvoff] pvoff as interfaces</content>
</entry>
<entry>
<title>[rt-smart] kernel virtual memory management layer (#6809)</title>
<updated>2023-01-09T02:08:55Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-01-09T02:08:55Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=7450ef6c4d71f992444d27f4a26c16f813ed8e55'/>
<id>urn:sha1:7450ef6c4d71f992444d27f4a26c16f813ed8e55</id>
<content type='text'>
synchronize virtual memory system works.
adding kernel virtual memory management layer for page-based MMU enabled architecture
porting libcpu MMU codes
porting lwp memory related codes</content>
</entry>
<entry>
<title>[rt-smart] 弱化 RT_USING_LWP，使用 RT_USING_SMART 作为宏配置 (#6740)</title>
<updated>2022-12-16T10:38:28Z</updated>
<author>
<name>guo</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-12-16T10:38:28Z</published>
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<id>urn:sha1:68ca9f07a60ad5cbe52b37b52299327b6246e7f7</id>
<content type='text'>
* [dfs] sync cromfs

* [rt-smart]Weaken RT_USING_LWP, use RT_USING_SMART as macro configuration

* [format] fix some format issue.</content>
</entry>
<entry>
<title>[libcpu] fix cpp11 error</title>
<updated>2022-12-14T03:04:00Z</updated>
<author>
<name>guozhanxin</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-12-14T02:37:13Z</published>
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<id>urn:sha1:e2bdd8a184deccf813c032875ad49bfdca882932</id>
<content type='text'>
</content>
</entry>
<entry>
<title>sync branch rt-smart. (#6641)</title>
<updated>2022-12-03T04:07:44Z</updated>
<author>
<name>guo</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-12-03T04:07:44Z</published>
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<id>urn:sha1:ecf2d8215961ca7c539132b62a72df6072cc3e14</id>
<content type='text'>
* Synchronize the code of the rt mart branch to the master branch.
  * TTY device
  * Add lwP code from rt-smart
  * Add vnode in DFS, but DFS will be re-write for rt-smart
  * There are three libcpu for rt-smart:
    * arm/cortex-a, arm/aarch64
    * riscv64

Co-authored-by: Rbb666 &lt;zhangbingru@rt-thread.com&gt;
Co-authored-by: zhkag &lt;zhkag@foxmail.com&gt;</content>
</entry>
<entry>
<title>[bsp] faster startup for cortex-a</title>
<updated>2022-11-25T09:04:35Z</updated>
<author>
<name>xiaoguang_ma</name>
<email>xiaoguang_ma@zuiki.co.jp</email>
</author>
<published>2022-11-25T09:04:35Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=16f6157b1e850ac9cba384e8b23fae07014c65db'/>
<id>urn:sha1:16f6157b1e850ac9cba384e8b23fae07014c65db</id>
<content type='text'>
If the application defines dozens of global variables,
the speed of clearing the bss segment will be slower.

Because icache can be enabled before the mmu enabled.
Therefore, in order to speed up the process of clearing the BSS segment,
enable icache needs to be put ahead.
</content>
</entry>
<entry>
<title>[update] Removed C++ global constructor initialization, this method is not used in GCC4.7 and later versions.</title>
<updated>2022-04-20T09:32:02Z</updated>
<author>
<name>zhouji</name>
<email>956133287@qq.com</email>
</author>
<published>2022-04-19T08:43:28Z</published>
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<id>urn:sha1:60c96fbc12a717832f30853ad439a44582bd6360</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[asm] 解决tab和空格混用的问题</title>
<updated>2022-01-20T12:57:35Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2022-01-18T05:35:13Z</published>
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<id>urn:sha1:563e49890c597c53adba954063c37b03644c5c69</id>
<content type='text'>
</content>
</entry>
<entry>
<title>调整代码，以支持cpu usage</title>
<updated>2021-07-05T10:33:22Z</updated>
<author>
<name>fenghuijie</name>
<email>fenghuijie1990@163.com</email>
</author>
<published>2021-07-05T10:33:22Z</published>
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<id>urn:sha1:0015af02e4f08ab47f2d2fefcb7c1aca1682bfda</id>
<content type='text'>
</content>
</entry>
<entry>
<title>调整异常处理代码结构，以支持backtrace功能</title>
<updated>2021-07-05T06:43:33Z</updated>
<author>
<name>fenghuijie</name>
<email>fenghuijie1990@163.com</email>
</author>
<published>2021-07-05T06:43:33Z</published>
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<id>urn:sha1:e933c1f6105caf4e68bd57bc5521767b32063a5f</id>
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</content>
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