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<title>rt-thread.git/libcpu/arm/cortex-a/start_gcc.S, branch v5.0.1</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/libcpu/arm/cortex-a/start_gcc.S?h=v5.0.1</id>
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<updated>2023-05-29T07:23:42Z</updated>
<entry>
<title>[libcpu] [cortex-a] Revert RT_SMP_AUTO_BOOT. (#7549)</title>
<updated>2023-05-29T07:23:42Z</updated>
<author>
<name>Wayne</name>
<email>wosayttn@gmail.com</email>
</author>
<published>2023-05-29T07:23:42Z</published>
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<id>urn:sha1:ed4b4ca9e654342fdd2390e404f1508744ef5c03</id>
<content type='text'>
Co-authored-by: Wayne Lin &lt;wclin@nuvoton.com&gt;</content>
</entry>
<entry>
<title>[libcpu] fix arm/cortex-a/start_gcc.S (#7515)</title>
<updated>2023-05-19T03:32:58Z</updated>
<author>
<name>huanghe</name>
<email>31907499+ssd4561@users.noreply.github.com</email>
</author>
<published>2023-05-19T03:32:58Z</published>
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<id>urn:sha1:9217865c6a40847f934ee87b0eaa1d72ad9e20fa</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu][component][debug] add debug info for gdb (#7033)</title>
<updated>2023-05-14T15:48:16Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-05-14T15:48:16Z</published>
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<id>urn:sha1:b7554a70d21582cab97028477941fb692ef248b8</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[bsp][phytium]适配rt-thread5.0.0 版本 (#7441)</title>
<updated>2023-05-11T02:25:21Z</updated>
<author>
<name>huanghe</name>
<email>31907499+ssd4561@users.noreply.github.com</email>
</author>
<published>2023-05-11T02:25:21Z</published>
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<id>urn:sha1:50a4e8c6625694eedfc2f4db20951daed754c4a3</id>
<content type='text'>
Co-authored-by: 朱耿宇 &lt;zhugengyu@phytium.com.cn&gt;</content>
</entry>
<entry>
<title>[libcpu/arm/cortex-a] Revert safety MMU initialization. (#6796)</title>
<updated>2023-03-31T02:06:28Z</updated>
<author>
<name>Wayne</name>
<email>wosayttn@gmail.com</email>
</author>
<published>2023-03-31T02:06:28Z</published>
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<id>urn:sha1:3309ef60011f2ddaf8ab32f5c0243c054188f152</id>
<content type='text'>
* Revert safety MMU initialization.

Co-authored-by: Wayne Lin &lt;wclin@nuvoton.com&gt;</content>
</entry>
<entry>
<title>[rt-smart] PV_OFFSET as a variable (#6904)</title>
<updated>2023-02-14T15:08:32Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-02-14T15:08:32Z</published>
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<id>urn:sha1:2d0974908659bd41d748e69fac0166c37b15cb02</id>
<content type='text'>
* [rt-smart/mem] remove pv_offset

* [rt-smart] list kernel space command

* [rt-smart] restore ioremap region

* [revert] restore kernel space isolation

* [rt-smart/pv_off] code format

* [rt-smart] add get_pvoff()

* [pvoffset] pvoff as constant for C codes

* [pvoff] pvoff as interfaces</content>
</entry>
<entry>
<title>[rt-smart] kernel virtual memory management layer (#6809)</title>
<updated>2023-01-09T02:08:55Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-01-09T02:08:55Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=7450ef6c4d71f992444d27f4a26c16f813ed8e55'/>
<id>urn:sha1:7450ef6c4d71f992444d27f4a26c16f813ed8e55</id>
<content type='text'>
synchronize virtual memory system works.
adding kernel virtual memory management layer for page-based MMU enabled architecture
porting libcpu MMU codes
porting lwp memory related codes</content>
</entry>
<entry>
<title>[rt-smart] 弱化 RT_USING_LWP，使用 RT_USING_SMART 作为宏配置 (#6740)</title>
<updated>2022-12-16T10:38:28Z</updated>
<author>
<name>guo</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-12-16T10:38:28Z</published>
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<id>urn:sha1:68ca9f07a60ad5cbe52b37b52299327b6246e7f7</id>
<content type='text'>
* [dfs] sync cromfs

* [rt-smart]Weaken RT_USING_LWP, use RT_USING_SMART as macro configuration

* [format] fix some format issue.</content>
</entry>
<entry>
<title>[libcpu] fix cpp11 error</title>
<updated>2022-12-14T03:04:00Z</updated>
<author>
<name>guozhanxin</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-12-14T02:37:13Z</published>
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<id>urn:sha1:e2bdd8a184deccf813c032875ad49bfdca882932</id>
<content type='text'>
</content>
</entry>
<entry>
<title>sync branch rt-smart. (#6641)</title>
<updated>2022-12-03T04:07:44Z</updated>
<author>
<name>guo</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-12-03T04:07:44Z</published>
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<id>urn:sha1:ecf2d8215961ca7c539132b62a72df6072cc3e14</id>
<content type='text'>
* Synchronize the code of the rt mart branch to the master branch.
  * TTY device
  * Add lwP code from rt-smart
  * Add vnode in DFS, but DFS will be re-write for rt-smart
  * There are three libcpu for rt-smart:
    * arm/cortex-a, arm/aarch64
    * riscv64

Co-authored-by: Rbb666 &lt;zhangbingru@rt-thread.com&gt;
Co-authored-by: zhkag &lt;zhkag@foxmail.com&gt;</content>
</entry>
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