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<title>rt-thread.git/libcpu/arm/cortex-a, branch v5.0.0</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/libcpu/arm/cortex-a?h=v5.0.0</id>
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<updated>2023-03-31T02:06:28Z</updated>
<entry>
<title>[libcpu/arm/cortex-a] Revert safety MMU initialization. (#6796)</title>
<updated>2023-03-31T02:06:28Z</updated>
<author>
<name>Wayne</name>
<email>wosayttn@gmail.com</email>
</author>
<published>2023-03-31T02:06:28Z</published>
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<id>urn:sha1:3309ef60011f2ddaf8ab32f5c0243c054188f152</id>
<content type='text'>
* Revert safety MMU initialization.

Co-authored-by: Wayne Lin &lt;wclin@nuvoton.com&gt;</content>
</entry>
<entry>
<title>[rt-smart] testcase &amp; improvements for memory management (#7099)</title>
<updated>2023-03-30T00:25:15Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-03-30T00:25:15Z</published>
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<id>urn:sha1:eec78d9f5d3f0a944500a1cac5802dfee2befc7b</id>
<content type='text'>
* [utest/mm] add testcase for create/init
format codes of create/init in components/mm

* [libcpu/aarch64] fix user stack check routine

* [kservice] export API for utest

* [utest/mm] testcase for aspace_map
format &amp; modify the files under components/mm related with aspace_map

* [lwp/user_mm] add user_map_varea for mmap feature

* [mm] rename rt_mm_fault_try_fix to rt_aspace_fault_try_fix

* [utest/mm] testcase for synchronization

* [mm] modify unmap api to improve throughput

* [utest/mm] testcases for cache and varea map

* [format] remove extra space

* [utest/mm] fix testcase problem in header

* [lwp] extend map_user_varea with a flag

* [utest/mm] testcase for lwp_map_user_varea

* [libcpu/arm/cortex-a] fix kernel space layout

* [utest/mm] adjust for armv7 arch</content>
</entry>
<entry>
<title>[rt-smart] move sys_cacheflush to lwp_syscall.c (#7048)</title>
<updated>2023-03-17T07:11:38Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-03-17T07:11:38Z</published>
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<id>urn:sha1:18a14cc9351e9c44df539ad21ce825679bc023ca</id>
<content type='text'>
* [syscall] move sys_cacheflush to lwp_syscall.c

* [syscall] improve assertion

* [format] rename to rt_ctassert

* [debug] modified ct assertion on mm_page.c</content>
</entry>
<entry>
<title>[fixup] add cache maintenance ops;</title>
<updated>2023-02-21T00:48:49Z</updated>
<author>
<name>wangxiaoyao</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-02-20T05:48:00Z</published>
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<id>urn:sha1:484a0d602e8b571a9d8186d38c8b136abc4ccfc9</id>
<content type='text'>
fix bugs on cache maintenance when starting user app
</content>
</entry>
<entry>
<title>[rt-smart] PV_OFFSET as a variable (#6904)</title>
<updated>2023-02-14T15:08:32Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-02-14T15:08:32Z</published>
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<id>urn:sha1:2d0974908659bd41d748e69fac0166c37b15cb02</id>
<content type='text'>
* [rt-smart/mem] remove pv_offset

* [rt-smart] list kernel space command

* [rt-smart] restore ioremap region

* [revert] restore kernel space isolation

* [rt-smart/pv_off] code format

* [rt-smart] add get_pvoff()

* [pvoffset] pvoff as constant for C codes

* [pvoff] pvoff as interfaces</content>
</entry>
<entry>
<title>[rt-smart] kernel virtual memory management layer (#6809)</title>
<updated>2023-01-09T02:08:55Z</updated>
<author>
<name>Shell</name>
<email>wangxiaoyao@rt-thread.com</email>
</author>
<published>2023-01-09T02:08:55Z</published>
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<id>urn:sha1:7450ef6c4d71f992444d27f4a26c16f813ed8e55</id>
<content type='text'>
synchronize virtual memory system works.
adding kernel virtual memory management layer for page-based MMU enabled architecture
porting libcpu MMU codes
porting lwp memory related codes</content>
</entry>
<entry>
<title>[rt-smart] 弱化 RT_USING_LWP，使用 RT_USING_SMART 作为宏配置 (#6740)</title>
<updated>2022-12-16T10:38:28Z</updated>
<author>
<name>guo</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-12-16T10:38:28Z</published>
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<id>urn:sha1:68ca9f07a60ad5cbe52b37b52299327b6246e7f7</id>
<content type='text'>
* [dfs] sync cromfs

* [rt-smart]Weaken RT_USING_LWP, use RT_USING_SMART as macro configuration

* [format] fix some format issue.</content>
</entry>
<entry>
<title>[libcpu] fix cpp11 error</title>
<updated>2022-12-14T03:04:00Z</updated>
<author>
<name>guozhanxin</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-12-14T02:37:13Z</published>
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<id>urn:sha1:e2bdd8a184deccf813c032875ad49bfdca882932</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[rtdef] use lower-case to define attributes (#6728)</title>
<updated>2022-12-11T18:12:03Z</updated>
<author>
<name>Man, Jianting (Meco)</name>
<email>920369182@qq.com</email>
</author>
<published>2022-12-11T18:12:03Z</published>
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<id>urn:sha1:99bdf978d7fe4ec18ed50a639e15b254825c871b</id>
<content type='text'>
* [rtdef] rename RT_WEAK attribute as rt_weak

* [rtdef] rename RT_USED attribute as rt_used

* [rtdef] rename RT_SECTION attribute as rt_section

* [rtdef] rename ALIGN attribute as rt_align

* [legacy] add RT_USED ALIGN RT_SECTION RT_WEAK as legacy support</content>
</entry>
<entry>
<title>sync branch rt-smart. (#6641)</title>
<updated>2022-12-03T04:07:44Z</updated>
<author>
<name>guo</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-12-03T04:07:44Z</published>
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<id>urn:sha1:ecf2d8215961ca7c539132b62a72df6072cc3e14</id>
<content type='text'>
* Synchronize the code of the rt mart branch to the master branch.
  * TTY device
  * Add lwP code from rt-smart
  * Add vnode in DFS, but DFS will be re-write for rt-smart
  * There are three libcpu for rt-smart:
    * arm/cortex-a, arm/aarch64
    * riscv64

Co-authored-by: Rbb666 &lt;zhangbingru@rt-thread.com&gt;
Co-authored-by: zhkag &lt;zhkag@foxmail.com&gt;</content>
</entry>
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