rt-thread.git/libcpu/arm/cortex-m4/SConscript, branch master

[arm][cortex-m4] Add hardware stack guard support

2026-08-26T02:37:02Z

Enable RT_USING_HW_STACK_GUARD on Cortex-M4, which was previously only available on Cortex-M7 and Cortex-M33. Core porting (libcpu/arm/cortex-m4/): - Add mpu.c/mpu.h/mputype.h aligned with the Cortex-M7 MPU layer. The only difference is the default memory type attribute: Cortex-M4 has no L1 cache, so the cacheability bits are reduced to three cases. - Add rt_hw_stack_guard_init() to cpuport.c. - Add missing #include to context_gcc.S and invoke rt_hw_mpu_table_switch() in the PendSV context switch path. - Update SConscript to exclude mpu.c when memory protection is disabled. BSP reference (bsp/stm32/stm32f407-fk407m2-zgt6/): - board.h: include rtthread.h and define NUM_STATIC_REGIONS. - board.c: define static_regions[] marking the Flash region read-only, guarded by RT_USING_MEM_PROTECTION so it is not enabled by default.

Reorganize Group names in build system for clarity and IDE integration #10923

2025-11-16T03:40:53Z

[libcpu][SConscript]规范group名为libcpu

2024-02-20T00:39:05Z

support llvm-arm 16.0

2023-05-17T16:09:10Z

[Scons][iar][iccarm] IAR统一使用iccarm作为判断条件而不是是用IDE的名字来进行判断

2022-06-08T23:01:59Z

因为不确定后续IAR是否会像Keil一样内含有不同的编译工具链此外，将判断条件改为列表方式，这样更方便后续增加其他可能的IAR编译链

[Scons] 将GCC判断条件改为列表方式，方便后续增加新的编译工具链

2022-06-08T23:01:59Z

[gcc][armcc][armclang] rtconfig.CROSS_TOOL->rtconfig.PLATFORM (#5802)

2022-04-20T01:56:04Z

* [gcc][armcc][armclang] rtconfig.CROSS_TOOL->rtconfig.PLATFORM

Revert "add clang-arm support."

2021-12-22T23:57:16Z

This reverts commit a5f6fdc780d55f2bf2a1624815879e15c51082b5.

add clang-arm support.

2021-12-22T05:03:05Z

[update] support armclang

2021-09-26T02:46:21Z