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<updated>2017-08-18T03:12:58Z</updated>
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<title>update libcpu: ensure fault enable.</title>
<updated>2017-08-18T03:12:58Z</updated>
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<name>aozima</name>
<email>wuyangyong@gmail.com</email>
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<title>Fix some spell error;</title>
<updated>2014-07-31T05:59:25Z</updated>
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<name>aozima</name>
<email>wuyangyong@gmail.com</email>
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<title>fix spelling error.</title>
<updated>2013-06-24T14:57:27Z</updated>
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<name>aozima</name>
<email>wuyangyong@gmail.com</email>
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<published>2013-06-24T14:55:14Z</published>
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<updated>2013-06-23T10:10:46Z</updated>
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<name>aozima</name>
<email>wuyangyong@gmail.com</email>
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<title>fixed bug: correct cortex-m SCB-&gt;VTOR address.</title>
<updated>2013-06-23T10:08:16Z</updated>
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<name>aozima</name>
<email>wuyangyong@gmail.com</email>
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<title>update libcpu/arm/cortex-m4: restore MSP.</title>
<updated>2013-06-22T10:59:49Z</updated>
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<name>aozima</name>
<email>wuyangyong@gmail.com</email>
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<title>convert end of line</title>
<updated>2013-01-08T13:05:02Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
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<published>2013-01-08T13:05:02Z</published>
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<title>update libcpu cortex-m4.</title>
<updated>2012-02-18T17:46:08Z</updated>
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<name>wuyangyong</name>
<email>wuyangyong@gmail.com</email>
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<published>2012-02-18T17:46:08Z</published>
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<title>support context switch load/store FPU register.</title>
<updated>2011-12-31T20:25:44Z</updated>
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<name>wuyangyong</name>
<email>wuyangyong@gmail.com</email>
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<published>2011-12-31T20:25:44Z</published>
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<title>add STM32F40x porting (uncompleted)</title>
<updated>2011-10-20T23:55:08Z</updated>
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<name>bernard.xiong@gmail.com</name>
<email>bernard.xiong@gmail.com</email>
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<published>2011-10-20T23:55:08Z</published>
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