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<title>rt-thread.git/libcpu/arm/cortex-m4/cpuport.c, branch v5.3.0</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/libcpu/arm/cortex-m4/cpuport.c?h=v5.3.0</id>
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<updated>2026-08-12T04:54:50Z</updated>
<entry>
<title>fix(dm): route Cortex-M resets through power core</title>
<updated>2026-08-12T04:54:50Z</updated>
<author>
<name>Rbb666</name>
<email>zhangbingru@rt-thread.com</email>
</author>
<published>2026-08-03T03:54:06Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=1f23e3f27052a6b7fd75def2da634c79db5773e2'/>
<id>urn:sha1:1f23e3f27052a6b7fd75def2da634c79db5773e2</id>
<content type='text'>
</content>
</entry>
<entry>
<title>feat(dm): support OFW on Cortex-M targets</title>
<updated>2026-08-12T04:54:50Z</updated>
<author>
<name>Rbb666</name>
<email>zhangbingru@rt-thread.com</email>
</author>
<published>2026-07-31T07:07:36Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=6b4f34204ed2da80b7c37b912612c65cebc30ce3'/>
<id>urn:sha1:6b4f34204ed2da80b7c37b912612c65cebc30ce3</id>
<content type='text'>
Add the ARM NVIC PIC driver, no-MMU I/O mapping, built-in FDT support, and Cortex-M CPU hooks required by the native RT-Thread device model.
</content>
</entry>
<entry>
<title>fix IAR build error</title>
<updated>2026-06-02T10:05:02Z</updated>
<author>
<name>蒙蒙plus</name>
<email>chengmeng_2@outlook.com</email>
</author>
<published>2026-05-28T10:08:24Z</published>
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<id>urn:sha1:b1d51b4964a316e7225b94728c6701b4948b0735</id>
<content type='text'>
</content>
</entry>
<entry>
<title>feat(core): Add Cortex-M4 interrupt context helpers</title>
<updated>2026-04-08T10:58:33Z</updated>
<author>
<name>wdfk-prog</name>
<email>1425075683@qq.com</email>
</author>
<published>2026-04-08T05:45:46Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=e74547bbb36c38bbebf8baca4d728b3db14885df'/>
<id>urn:sha1:e74547bbb36c38bbebf8baca4d728b3db14885df</id>
<content type='text'>
</content>
</entry>
<entry>
<title>rt_hw_cpu_shutdown: implement default weak function</title>
<updated>2023-08-09T02:34:25Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2023-08-07T16:42:10Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=c6a2f5b7bdee378cc868ee9284e760ebbdf635f0'/>
<id>urn:sha1:c6a2f5b7bdee378cc868ee9284e760ebbdf635f0</id>
<content type='text'>
and remvoe duplicated default functions in each cpu/bsp level
</content>
</entry>
<entry>
<title>rt_hw_cpu_reset: remove all other rt_weak</title>
<updated>2023-08-09T02:34:25Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2023-08-07T16:30:43Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=cb810dfe750dab6a53a8c20d83f082e0a12ab024'/>
<id>urn:sha1:cb810dfe750dab6a53a8c20d83f082e0a12ab024</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[kernel] 将rt_thread结构体改为显式继承rt_object (#7131)</title>
<updated>2023-04-04T13:06:27Z</updated>
<author>
<name>Shicheng Chu</name>
<email>1468559561@qq.com</email>
</author>
<published>2023-04-04T13:06:27Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=93f3cb30e48d5de341bda09fa806120e2bc3f3ad'/>
<id>urn:sha1:93f3cb30e48d5de341bda09fa806120e2bc3f3ad</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[rtdef] use lower-case to define attributes (#6728)</title>
<updated>2022-12-11T18:12:03Z</updated>
<author>
<name>Man, Jianting (Meco)</name>
<email>920369182@qq.com</email>
</author>
<published>2022-12-11T18:12:03Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=99bdf978d7fe4ec18ed50a639e15b254825c871b'/>
<id>urn:sha1:99bdf978d7fe4ec18ed50a639e15b254825c871b</id>
<content type='text'>
* [rtdef] rename RT_WEAK attribute as rt_weak

* [rtdef] rename RT_USED attribute as rt_used

* [rtdef] rename RT_SECTION attribute as rt_section

* [rtdef] rename ALIGN attribute as rt_align

* [legacy] add RT_USED ALIGN RT_SECTION RT_WEAK as legacy support</content>
</entry>
<entry>
<title>[libcpu][arm] fix armclang error when enable LTO</title>
<updated>2022-08-11T12:35:42Z</updated>
<author>
<name>tfx2001</name>
<email>tfx2001@outlook.com</email>
</author>
<published>2022-08-11T06:45:43Z</published>
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<id>urn:sha1:21ee452661d754848e7975ad41fb8da7bedb54ae</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu][arm] ArmClang 编译优化错误 (#6071)</title>
<updated>2022-06-15T09:19:51Z</updated>
<author>
<name>JonasWen</name>
<email>jonaswen@163.com</email>
</author>
<published>2022-06-15T09:19:51Z</published>
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<id>urn:sha1:b010e434ed3839e5064f7fc8337591a18d6b67cd</id>
<content type='text'>
</content>
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