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<title>rt-thread.git/libcpu/arm/cortex-m4/mpu.h, branch master</title>
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<updated>2026-09-01T01:39:10Z</updated>
<entry>
<title>fix[arm][cortex-m4]: clarify MPU permission expressions</title>
<updated>2026-09-01T01:39:10Z</updated>
<author>
<name>wdfk-prog</name>
<email>1425075683@qq.com</email>
</author>
<published>2026-08-29T02:24:53Z</published>
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<entry>
<title>[arm][cortex-m4] Add hardware stack guard support</title>
<updated>2026-08-26T02:37:02Z</updated>
<author>
<name>hanzhijian</name>
<email>hanzhijian@zepp.com</email>
</author>
<published>2026-08-25T01:19:51Z</published>
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<id>urn:sha1:e2e6245aace07b545b8dbcef8fbcdb4469f55d9f</id>
<content type='text'>
Enable RT_USING_HW_STACK_GUARD on Cortex-M4, which was previously only
available on Cortex-M7 and Cortex-M33.

Core porting (libcpu/arm/cortex-m4/):
- Add mpu.c/mpu.h/mputype.h aligned with the Cortex-M7 MPU layer. The only
  difference is the default memory type attribute: Cortex-M4 has no L1 cache,
  so the cacheability bits are reduced to three cases.
- Add rt_hw_stack_guard_init() to cpuport.c.
- Add missing #include &lt;rtconfig.h&gt; to context_gcc.S and invoke
  rt_hw_mpu_table_switch() in the PendSV context switch path.
- Update SConscript to exclude mpu.c when memory protection is disabled.

BSP reference (bsp/stm32/stm32f407-fk407m2-zgt6/):
- board.h: include rtthread.h and define NUM_STATIC_REGIONS.
- board.c: define static_regions[] marking the Flash region read-only,
  guarded by RT_USING_MEM_PROTECTION so it is not enabled by default.
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