rt-thread.git/libcpu/arm/s3c24x0, branch v4.0.2Unnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/rt-thread.git/atom/libcpu/arm/s3c24x0?h=v4.0.22019-01-06T22:09:45Z[libcpu] Add SConscript in libcpu.2019-01-06T22:09:45ZBernard Xiongbernard.xiong@gmail.com2019-01-06T22:09:45Zurn:sha1:bde47018b8327fb8106c68e84a719a97243a1653[libcpu/arm/s3c24x0]rt_hw_interrupt_install函数name参数增加const限定2018-12-05T12:36:48Zliruncongliruncong2018@qq.com2018-12-05T12:36:48Zurn:sha1:46c5c8267ac2c75d525b679f264eaf3e9b4e34d2[license] Change the license of libarm to Apache.2018-10-14T17:35:07ZBernard Xiongbernard.xiong@gmail.com2018-10-14T17:35:07Zurn:sha1:7c425408b4335d7af2fefcfa51174735b98037ed[libcpu]: add 8-byte alignment for arm architecture && optimize code format2017-12-21T08:37:38ZSummerGiftzy_770077@qq.com2017-12-21T08:32:35Zurn:sha1:fc7a5abc7635a1b37bd9202072f279e9930e5eb5[libcpu] add volatile for __asm.2017-11-22T01:54:36ZSummerGiftzy_770077@qq.com2017-11-21T09:18:33Zurn:sha1:eb72d191791c72080bc82e1e274c452265e03c5b[libcpu] add volatile for asm (" mcr ") or asm (" mrc ") instruct.2017-11-22T01:54:27ZSummerGiftzy_770077@qq.com2017-11-21T09:08:49Zurn:sha1:2488624a184fced9df5b2c03c55e1f6db683512e[BSP] change the type of cmd.2017-10-16T05:23:03Zbernardbernard.xiong@rt-thread.com2017-10-16T05:23:03Zurn:sha1:5e3b3b19a6994c7113bfa823342b35fbb61287ce
1. Change the type of cmd to 'int';
2. Remove RT_LWIP_USING_RT_MEM macro;
Signed-off-by: visitor83 <wolflouiswang@gmail.com>2013-06-18T04:51:55Zvisitor83wolflouiswang@gmail.com2013-06-18T04:51:55Zurn:sha1:c986754c49bd43ef6030b3f5b1215c904fc1d855
format the s3c24x0 serial.c and mini2440 rtconfig.py
update mini2440: Modify the interrupt interface implementations.2013-03-31T09:30:30Zaozimawuyangyong@gmail.com2013-03-23T08:38:13Zurn:sha1:fbc1b05dd8c07fb95d9d02a476a604252dbc7ac3convert end of line2013-01-08T13:05:02ZBernard Xiongbernard.xiong@gmail.com2013-01-08T13:05:02Zurn:sha1:72782e920325808bbc58fc2344fc52033479b627