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<title>rt-thread.git/libcpu/arm/sep4020, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/libcpu/arm/sep4020?h=master</id>
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<updated>2026-04-07T02:07:41Z</updated>
<entry>
<title>fix(libcpu): validate arm irq vectors before masking</title>
<updated>2026-04-07T02:07:41Z</updated>
<author>
<name>AFWEF_147</name>
<email>olm_cse@hust.edu.cn</email>
</author>
<published>2026-03-26T13:55:23Z</published>
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<id>urn:sha1:21d223f08986e3252eb0e8ff4510efe0e0e3877c</id>
<content type='text'>
</content>
</entry>
<entry>
<title>chore: fix typo in components and libcpu</title>
<updated>2026-02-13T13:54:59Z</updated>
<author>
<name>theqengineer</name>
<email>zyrhqu@gmail.com</email>
</author>
<published>2026-02-13T07:04:27Z</published>
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<id>urn:sha1:85b656b14dcfe8a3ab27c819e168dde082ab39ef</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Reorganize Group names in build system for clarity and IDE integration #10923</title>
<updated>2025-11-16T03:40:53Z</updated>
<author>
<name>Copilot</name>
<email>198982749+Copilot@users.noreply.github.com</email>
</author>
<published>2025-11-16T03:40:53Z</published>
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<id>urn:sha1:30e1e5e9dcdaff17258edf70b9f9783e08356288</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[kernel] Specification interrupt nested level variable declaration type (#9568)</title>
<updated>2024-10-23T21:08:29Z</updated>
<author>
<name>Yuqiang Wang</name>
<email>yifang.wangyq@foxmail.com</email>
</author>
<published>2024-10-23T21:08:29Z</published>
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<id>urn:sha1:b3d59050b049f03d954273e8921f941dd806360a</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu][SConscript]规范group名为libcpu</title>
<updated>2024-02-20T00:39:05Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2024-02-19T19:33:47Z</published>
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<id>urn:sha1:6d4503363a352c72148bc91da3026f0db096f119</id>
<content type='text'>
</content>
</entry>
<entry>
<title>rt_hw_cpu_shutdown: implement default weak function</title>
<updated>2023-08-09T02:34:25Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2023-08-07T16:42:10Z</published>
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<id>urn:sha1:c6a2f5b7bdee378cc868ee9284e760ebbdf635f0</id>
<content type='text'>
and remvoe duplicated default functions in each cpu/bsp level
</content>
</entry>
<entry>
<title>rt_hw_cpu_reset: remove all other rt_weak</title>
<updated>2023-08-09T02:34:25Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2023-08-07T16:30:43Z</published>
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<id>urn:sha1:cb810dfe750dab6a53a8c20d83f082e0a12ab024</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[debug] 整理debug宏并增加RT_DEBUGING_CONTEXT (#7805)</title>
<updated>2023-07-22T02:36:42Z</updated>
<author>
<name>Man, Jianting (Meco)</name>
<email>920369182@qq.com</email>
</author>
<published>2023-07-22T02:36:42Z</published>
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<id>urn:sha1:244b903e5def3cd4aefc4bf2ebdc4687826e2f4d</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[kernel] 将rt_thread结构体改为显式继承rt_object (#7131)</title>
<updated>2023-04-04T13:06:27Z</updated>
<author>
<name>Shicheng Chu</name>
<email>1468559561@qq.com</email>
</author>
<published>2023-04-04T13:06:27Z</published>
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<id>urn:sha1:93f3cb30e48d5de341bda09fa806120e2bc3f3ad</id>
<content type='text'>
</content>
</entry>
<entry>
<title>rt_device_write/read return data type as rt_ssize_t</title>
<updated>2023-02-08T02:43:57Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2023-02-05T23:35:33Z</published>
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<id>urn:sha1:f58d3c5200d5a51a39503c5311422e2fb99d3d20</id>
<content type='text'>
rt_ssize_t can give negative error code, which follows the unix style correctly
</content>
</entry>
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