<feed xmlns='http://www.w3.org/2005/Atom'>
<title>rt-thread.git/libcpu/arm, branch copilot/fix-aarch64-github-actions-job</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/libcpu/arm?h=copilot%2Ffix-aarch64-github-actions-job</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/libcpu/arm?h=copilot%2Ffix-aarch64-github-actions-job'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/'/>
<updated>2026-06-02T10:05:02Z</updated>
<entry>
<title>fix IAR build error</title>
<updated>2026-06-02T10:05:02Z</updated>
<author>
<name>蒙蒙plus</name>
<email>chengmeng_2@outlook.com</email>
</author>
<published>2026-05-28T10:08:24Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=b1d51b4964a316e7225b94728c6701b4948b0735'/>
<id>urn:sha1:b1d51b4964a316e7225b94728c6701b4948b0735</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu][arm][cortex-m33] allows rewrite to interrupt enable/disable api to support independent interrupts management</title>
<updated>2026-05-19T08:34:34Z</updated>
<author>
<name>Evlers</name>
<email>1425295900@qq.com</email>
</author>
<published>2026-05-19T07:07:23Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=ad205d2bf36f009a723288638f22fd162e6f327f'/>
<id>urn:sha1:ad205d2bf36f009a723288638f22fd162e6f327f</id>
<content type='text'>
</content>
</entry>
<entry>
<title>feat(core): Add Cortex-M4 interrupt context helpers</title>
<updated>2026-04-08T10:58:33Z</updated>
<author>
<name>wdfk-prog</name>
<email>1425075683@qq.com</email>
</author>
<published>2026-04-08T05:45:46Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=e74547bbb36c38bbebf8baca4d728b3db14885df'/>
<id>urn:sha1:e74547bbb36c38bbebf8baca4d728b3db14885df</id>
<content type='text'>
</content>
</entry>
<entry>
<title>fix(libcpu): correct arm mpu region validation precedence</title>
<updated>2026-04-07T02:13:33Z</updated>
<author>
<name>AFWEF_147</name>
<email>olm_cse@hust.edu.cn</email>
</author>
<published>2026-03-26T13:55:23Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=2960935d2e34623a316fd0e9c5f6399d9e937f04'/>
<id>urn:sha1:2960935d2e34623a316fd0e9c5f6399d9e937f04</id>
<content type='text'>
</content>
</entry>
<entry>
<title>fix(libcpu): validate arm irq vectors before masking</title>
<updated>2026-04-07T02:07:41Z</updated>
<author>
<name>AFWEF_147</name>
<email>olm_cse@hust.edu.cn</email>
</author>
<published>2026-03-26T13:55:23Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=21d223f08986e3252eb0e8ff4510efe0e0e3877c'/>
<id>urn:sha1:21d223f08986e3252eb0e8ff4510efe0e0e3877c</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[docs][libcpu][arm][cortex-a] correct TLBIALL comments in start_gcc.S</title>
<updated>2026-04-03T12:13:35Z</updated>
<author>
<name>laidene</name>
<email>228526434@qq.com</email>
</author>
<published>2026-04-02T01:36:07Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=11a1348ed6d2490a54e0e248fdf031119d5779ff'/>
<id>urn:sha1:11a1348ed6d2490a54e0e248fdf031119d5779ff</id>
<content type='text'>
</content>
</entry>
<entry>
<title>feat(core): Add 8-bit and 16-bit atomic operation support</title>
<updated>2026-03-16T02:27:53Z</updated>
<author>
<name>wdfk-prog</name>
<email>1425075683@qq.com</email>
</author>
<published>2026-03-13T06:15:05Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=05445c04e8dc0a7968330ee981aac8de2c6315cc'/>
<id>urn:sha1:05445c04e8dc0a7968330ee981aac8de2c6315cc</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu][cortex-m7]Canonical alignment</title>
<updated>2026-03-15T05:02:57Z</updated>
<author>
<name>wdfk-prog</name>
<email>1425075683@qq.com</email>
</author>
<published>2024-08-05T15:56:29Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=b7686b8d793527b14d3ff52a7db42a01f9dc6f69'/>
<id>urn:sha1:b7686b8d793527b14d3ff52a7db42a01f9dc6f69</id>
<content type='text'>
</content>
</entry>
<entry>
<title>chore: fix typo in components and libcpu</title>
<updated>2026-02-13T13:54:59Z</updated>
<author>
<name>theqengineer</name>
<email>zyrhqu@gmail.com</email>
</author>
<published>2026-02-13T07:04:27Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=85b656b14dcfe8a3ab27c819e168dde082ab39ef'/>
<id>urn:sha1:85b656b14dcfe8a3ab27c819e168dde082ab39ef</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu][arm][cortex-a] Fixup mmu setup early</title>
<updated>2026-01-10T05:30:09Z</updated>
<author>
<name>laidene</name>
<email>228526434@qq.com</email>
</author>
<published>2025-12-26T02:42:15Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=68a5c6a83b2b944d23dbcec1e6f31d846814b753'/>
<id>urn:sha1:68a5c6a83b2b944d23dbcec1e6f31d846814b753</id>
<content type='text'>
	Correct the starting virtual address of _reset alignment to 16MB
</content>
</entry>
</feed>
