<feed xmlns='http://www.w3.org/2005/Atom'>
<title>rt-thread.git/libcpu/arm, branch copilot/refactor-hwtimer-ktime-cputime</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/libcpu/arm?h=copilot%2Frefactor-hwtimer-ktime-cputime</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/libcpu/arm?h=copilot%2Frefactor-hwtimer-ktime-cputime'/>
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<updated>2025-11-16T03:40:53Z</updated>
<entry>
<title>Reorganize Group names in build system for clarity and IDE integration #10923</title>
<updated>2025-11-16T03:40:53Z</updated>
<author>
<name>Copilot</name>
<email>198982749+Copilot@users.noreply.github.com</email>
</author>
<published>2025-11-16T03:40:53Z</published>
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<id>urn:sha1:30e1e5e9dcdaff17258edf70b9f9783e08356288</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu][cortex-a] Refactor FPU stack initialization for maintainability (#10919)</title>
<updated>2025-11-11T20:34:34Z</updated>
<author>
<name>Copilot</name>
<email>198982749+Copilot@users.noreply.github.com</email>
</author>
<published>2025-11-11T20:34:34Z</published>
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<id>urn:sha1:e525c38cb8d742d6d5b9f879ddfa588d3e1fcf71</id>
<content type='text'>
* Initial plan

* [libcpu][cortex-a] Improve FPU stack initialization implementation

Co-authored-by: BernardXiong &lt;1241087+BernardXiong@users.noreply.github.com&gt;

* [libcpu][cortex-a] Replace FPU init loop with rt_memset

Co-authored-by: BernardXiong &lt;1241087+BernardXiong@users.noreply.github.com&gt;

---------

Co-authored-by: copilot-swe-agent[bot] &lt;198982749+Copilot@users.noreply.github.com&gt;
Co-authored-by: BernardXiong &lt;1241087+BernardXiong@users.noreply.github.com&gt;</content>
</entry>
<entry>
<title>[Components] Remove vbus component and realview-a8-vmm libcpu (#10863)</title>
<updated>2025-11-07T09:03:05Z</updated>
<author>
<name>Copilot</name>
<email>198982749+Copilot@users.noreply.github.com</email>
</author>
<published>2025-11-07T09:03:05Z</published>
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<id>urn:sha1:c631b3931764690466da11c2d793183f05262d5c</id>
<content type='text'>
* Initial plan

* Remove vbus component and related code

Co-authored-by: BernardXiong &lt;1241087+BernardXiong@users.noreply.github.com&gt;

---------

Co-authored-by: copilot-swe-agent[bot] &lt;198982749+Copilot@users.noreply.github.com&gt;
Co-authored-by: BernardXiong &lt;1241087+BernardXiong@users.noreply.github.com&gt;</content>
</entry>
<entry>
<title>[libcpu/arm/cortex-m33]: Fix incorrect CPU architecture in GCC context switch</title>
<updated>2025-11-02T08:23:31Z</updated>
<author>
<name>Yucai Liu</name>
<email>yucai.liu@sunseekerpower.cn</email>
</author>
<published>2025-11-01T07:21:09Z</published>
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<id>urn:sha1:c91a7f46f576ea89271a29365b36fd3fd0265a01</id>
<content type='text'>
The context_gcc.S file was incorrectly marked as cortex-m4 in both the
doxygen comment and .cpu directive, while the IAR and KEIL versions
correctly specify cortex-m33. This file uses ARMv8-M specific features
(PSPLIM register, TrustZone support) that are not available in Cortex-M4.

Changes:
- Update doxygen group from cortex-m4 to cortex-m33
- Change .cpu directive from cortex-m4 to cortex-m33
</content>
</entry>
<entry>
<title>bsp/w60x: fixes cppcheck: (#10781)</title>
<updated>2025-10-11T01:28:52Z</updated>
<author>
<name>Yonggang Luo</name>
<email>luoyonggang@gmail.com</email>
</author>
<published>2025-10-11T01:28:52Z</published>
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<id>urn:sha1:5ae232b6d0752ab823b5d0a52ef0aa269fdb3aed</id>
<content type='text'>
[cpp_check.py 80 INFO] bsp/w60x/drivers/drv_rtc.c:58:11: error: Syntax Error: AST broken, binary operator '&amp;=' doesn't have two operands. [internalAstError]

[cpp_check.py 80 INFO] libcpu/arm/s3c24x0/rtc.c:34:12: error: Expression 'RTCCON|=RTCCON|=0x01' depends on order of evaluation of side effects [unknownEvaluationOrder]</content>
</entry>
<entry>
<title>Remove rarely used rt_time_t</title>
<updated>2025-10-10T12:21:40Z</updated>
<author>
<name>Yonggang Luo</name>
<email>luoyonggang@gmail.com</email>
</author>
<published>2025-09-27T00:20:12Z</published>
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<id>urn:sha1:62bc4ba774b9137e8ca5fbdd579ebfd09b6be033</id>
<content type='text'>
next_delay should be rt_tick_t

Use time_t for RT_DEVICE_CTRL_RTC_GET_TIME
</content>
</entry>
<entry>
<title>fix:Fixed compilation error for libcpu/cortex-m4. (#10756)</title>
<updated>2025-09-28T08:08:02Z</updated>
<author>
<name>R b b666</name>
<email>64397326+Rbb666@users.noreply.github.com</email>
</author>
<published>2025-09-28T08:08:02Z</published>
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<id>urn:sha1:2b65a6f2a77f8871cc345b2250d8b2ac1045839b</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu][cortex-m33]Added HardFault_Handler to save floating point registers</title>
<updated>2025-08-20T10:17:19Z</updated>
<author>
<name>Rbb666</name>
<email>zhangbingru@rt-thread.com</email>
</author>
<published>2025-08-20T10:13:15Z</published>
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<id>urn:sha1:882d1958dd45d3a706db8279c5ba0f9be18baf6a</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu][cortex-m4]Added HardFault_Handler to save floating point registers.</title>
<updated>2025-08-19T13:40:57Z</updated>
<author>
<name>Rbb666</name>
<email>zhangbingru@rt-thread.com</email>
</author>
<published>2025-08-18T14:46:10Z</published>
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<id>urn:sha1:990fc23628a0ce6285162abfe1f36e08e3592d60</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu ][cm3]The parameter passed to the unified rt_exception_hook is exception_stack. (#10619)</title>
<updated>2025-08-19T13:15:47Z</updated>
<author>
<name>R b b666</name>
<email>64397326+Rbb666@users.noreply.github.com</email>
</author>
<published>2025-08-19T13:15:47Z</published>
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<id>urn:sha1:2f19ba6ce76f0f72c23da8dd11c2abe6581b1ab0</id>
<content type='text'>
</content>
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