rt-thread.git/libcpu/arm, branch v2.0.0_beta Unnamed repository; edit this file 'description' to name the repository. http://cgit.235523.xyz/rt-thread.git/atom/libcpu/arm?h=v2.0.0_beta 2014-07-31T05:59:25Z Fix some spell error; 2014-07-31T05:59:25Z aozima wuyangyong@gmail.com 2014-07-31T05:53:57Z urn:sha1:2c47f2e6838c713a9b64f0e9566b1ca24ad0a9b5 bsp: add zynq7000 2014-06-27T06:12:36Z Grissiom chaos.proton@gmail.com 2014-06-27T04:26:24Z urn:sha1:97fb91dcc675d058309570dcbdd5c3120ebcf118 [bsp/rva8] enable group{0,1} interrupt forwarding in gic initialization 2014-04-08T03:54:03Z Grissiom chaos.proton@gmail.com 2014-04-08T03:54:03Z urn:sha1:2b7be29cade03e7648f00500d8f8993442222485 When RT-Thread is running stand alone, it forgot to enable the distributor of GIC. [libcpu/arm] remove useless cpsr updating in rt_hw_context_switch_to 2014-04-08T03:24:04Z Grissiom chaos.proton@gmail.com 2014-04-08T03:24:04Z urn:sha1:c0f0c2322f9439fda4fc98f5b13e6cbb98cf92a5 This piece of code will enable the interrupt early before switching to the first thread. Although it is harmless, but not prefect. [vmm] add realview-pb-a8 VMM support 2014-04-03T09:59:14Z Grissiom chaos.proton@gmail.com 2014-03-29T04:14:24Z urn:sha1:28f11fdd7bdc43855081c274a65bc98372002226 add CM_PER_UARTx_CLKCTRL 2014-01-11T07:14:36Z RTsien rqtsien@gmail.com 2014-01-11T07:14:36Z urn:sha1:9382a7105f9e14bd74398983aa0c526b4e3dd0dd cortex-r4: use byte to allocate the stack 2013-11-17T04:49:08Z Grissiom chaos.proton@gmail.com 2013-11-17T04:19:04Z urn:sha1:0c9b9ced315210159974dcba7d0dc40c18c46ad2 Unit of "byte" is more intuitive than "long". cortex-r4: let svc mode reuse the stack of IRQ on startup 2013-11-17T04:49:07Z Grissiom chaos.proton@gmail.com 2013-11-17T04:13:25Z urn:sha1:a8520ed383e9557993d647f477ecb4d6658c3ccd As the svc stack is the stack of threads, there is no need to allocate a separate stack for the startup. Reuse the IRQ stack should be OK. Tested on rm48 board. Fix hardfault bug for gcc port 2013-11-04T08:10:11Z Bright Pan loststriker@gmail.com 2013-11-04T08:10:11Z urn:sha1:06987e72e5e8669fb50ba826344f67d6c6957b15 for 2013-02-20 aozima commmit "port for gcc", but the commit is not tested,and the kernel is breakdown in context_gcc.S, the file is a copy from cortex-m3,but not port for cortex-m0, so i complete this port for aozima, test it in stm32f0discovery board , and it works fine. cortex-r4: dump register on traps 2013-10-20T15:46:50Z Grissiom chaos.proton@gmail.com 2013-10-20T15:00:44Z urn:sha1:377c6e6cc9b415793d4787c86d0e9dea5e47e914 We could not handle any traps except IRQ/FIQ.