rt-thread.git/libcpu/arm, branch v2.1.0_alpha Unnamed repository; edit this file 'description' to name the repository. http://cgit.235523.xyz/rt-thread.git/atom/libcpu/arm?h=v2.1.0_alpha 2015-05-11T02:36:11Z [libcpu][am335x] Fix the booting failure when enabling MMU 2015-05-11T02:36:11Z Adrian Huang adrianhuang0701@gmail.com 2015-05-11T01:57:12Z urn:sha1:42226779338716fbef7ab4eab6386fe3462912ae Since the 16 domains are configured as the client domains in mmu_setttbase(), a Permission fault is generated if the XN bit (Execute-never) is set in the short-descriptor translation table (for section and supersection). This leads to the booting failure when enabling MMU for beagleboard bsp. Here is log: ---------------------------------------------------------------- SD/MMC found on device 0 reading uEnv.txt 117 bytes read in 3 ms (38.1 KiB/s) Loaded environment from uEnv.txt Importing environment from mmc ... Running uenvcmd ... reading rtthread.bin 162624 bytes read in 24 ms (6.5 MiB/s) \## Starting application at 0x80200000 ... ---------------------------------------------------------------- This commit removes the XN bit configuration in the section of the short-descriptor translation table. The OS can be booted successfully with applying this commit. [libcpu][arm926] Optimize irq trap code. 2015-05-04T08:13:43Z ardafu pengfei.fu@gmail.com 2015-05-04T08:13:43Z urn:sha1:a13132b302c7bdc16cd5b42ad436b023915e6224 [libcpu][arm926] Optimize code 2015-04-22T03:19:50Z ardafu pengfei.fu@gmail.com 2015-04-22T03:19:50Z urn:sha1:49fa5c44d7c293e85dc17be2063f1f1c14956f30 1. Combine code for IAR and GCC in file mmu.c and cpuport.c 2. Remove remap code in start_xxx.S. User should config MMU to map vector table to visual address 0x0 [libcpu][arm926] Remove unused SPSR register PUSH/POP when os switch thread. 2015-04-16T06:13:43Z ardafu pengfei.fu@gmail.com 2015-04-16T06:13:43Z urn:sha1:175e357acecdbe86200fdc8a0866716d822ca516 [libcpu][arm926] Define vector table start at BSP/{board}/platform/ assemble INC files. 2015-04-16T02:35:12Z ardafu pengfei.fu@gmail.com 2015-04-16T02:35:12Z urn:sha1:cf3d639fcb80d61e098b20ae3f24c9783a096217 1. [bsp][sam9260] Fix the bug that auto reset after boot 20s. Disable watchdog in rt_lovel_level_init function. 2015-04-15T08:13:30Z ardafu pengfei.fu@gmail.com 2015-04-15T08:08:43Z urn:sha1:6aa242645fc55cc776cfb1e87414e70037ecdd43 2. [bsp][sam9260] Modify SCONS scripts to support IAR tool chain. 3. [bsp][sam9260] Move link strips in to folder link_scripts. 4. [libcpu][arm926] Add copy right to source file and format code. 1. [cpu] split ARM926 cpu code from AT91SAM9260 BSP 2015-04-14T13:56:34Z ardafu pengfei.fu@gmail.com 2015-04-14T13:56:34Z urn:sha1:39452b67b0351ac7b0b941971c4fe3be8f76d57e Fix compile warning: 2015-03-09T01:31:23Z Bright Pan bright_pan@163.com 2015-03-09T01:31:23Z urn:sha1:0b5958d7006faf711fcf7fe33a4992bfb588aeee ..\..\libcpu\arm\cortex-m3\context_rvds.S(207): warning: A1581W: Added 2 bytes of padding at address 0xd6 Merge pull request #2 from RT-Thread/master 2014-09-19T17:19:42Z 陈豪 547884940@qq.com 2014-09-19T17:19:42Z urn:sha1:62af08370bef02ab49c8207414ed709d5c78381f sync [libcpu] Add builtin ffs implementation for Cortex-M4. 2014-09-11T04:51:33Z bernard bernard.xiong@gmail.com 2014-09-11T04:51:33Z urn:sha1:267c61ebceb3beef30a1423e30d81edd5878d0ef