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<title>rt-thread.git/libcpu/arm, branch v4.0.1</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/libcpu/arm?h=v4.0.1</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/libcpu/arm?h=v4.0.1'/>
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<updated>2019-05-14T01:36:31Z</updated>
<entry>
<title>[bsp][at91sam9g45]Fix build bugs which caused by the change of libcpu/arm/arm926/start_gcc.S</title>
<updated>2019-05-14T01:36:31Z</updated>
<author>
<name>neal</name>
<email>pin001@163.com</email>
</author>
<published>2019-05-13T06:17:27Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=257d21c0bdc78d87ed7a30f9b3577ceaf247fdff'/>
<id>urn:sha1:257d21c0bdc78d87ed7a30f9b3577ceaf247fdff</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[BSP][qemu-vexpress-a9] code cleaup for compiling warning.</title>
<updated>2019-05-12T07:07:26Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2019-05-12T07:07:26Z</published>
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<id>urn:sha1:ec6cb9f2602c11a676b059c8f23401422690227c</id>
<content type='text'>
</content>
</entry>
<entry>
<title>fix signal code</title>
<updated>2019-05-11T01:34:26Z</updated>
<author>
<name>shaojinchun</name>
<email>shaojinchun@rt-thread.com</email>
</author>
<published>2019-05-09T11:28:52Z</published>
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<id>urn:sha1:6cdfb2ac92d8422136f926024b2c2f969fce6b9e</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu][arm/cortex-a] Add correct comments.</title>
<updated>2019-05-09T00:48:38Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2019-05-09T00:39:08Z</published>
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<id>urn:sha1:d729448f5e84b96eaede631cab5201c21bfe24e1</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu/cortex-m7]add cache driver</title>
<updated>2019-04-27T09:35:46Z</updated>
<author>
<name>misonyo</name>
<email>misonyo@foxmail.com</email>
</author>
<published>2019-04-27T09:35:46Z</published>
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<id>urn:sha1:0f33da3f0e222461e505a933f4d66b328f10479a</id>
<content type='text'>
</content>
</entry>
<entry>
<title>修改lwp支持中arm cortex-a的swi入口函数处理</title>
<updated>2019-04-27T05:54:51Z</updated>
<author>
<name>shaojinchun</name>
<email>shaojinchun@rt-thread.com</email>
</author>
<published>2019-04-27T05:54:51Z</published>
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<id>urn:sha1:1e7bd3d8a1082060f6cf71631849da903787d045</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Rename 'platform.h' in 'imx6ul' and 'qemu-vexpress-a9' BSPs.</title>
<updated>2019-04-26T02:50:48Z</updated>
<author>
<name>qz721</name>
<email>295354721@qq.com</email>
</author>
<published>2019-04-26T02:50:48Z</published>
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<id>urn:sha1:61f2a71511121bf48949a6f3df9cd4089410b003</id>
<content type='text'>
This filename conflicts with the 'mbedtls' package. They are renamed
in the name of the corresponding chips and included in 'board.h'.
Files that rely on this file should include 'board.h' instead.
</content>
</entry>
<entry>
<title>Merge pull request #2527 from xuzhuoyi/gd32e230</title>
<updated>2019-04-07T08:59:27Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2019-04-07T08:59:27Z</published>
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<id>urn:sha1:44c3f5599622c5f8ee3848fcbe093ea16d5cad19</id>
<content type='text'>
[bsp] Add GD32E230K-START support</content>
</entry>
<entry>
<title>Merge pull request #2530 from qz721/libcpu_cortex_a</title>
<updated>2019-04-01T09:43:19Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2019-04-01T09:43:19Z</published>
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<id>urn:sha1:238c93468f810a78996a9ffe4c61b14397479a2d</id>
<content type='text'>
Disable the data alignment check.</content>
</entry>
<entry>
<title>Disable the data alignment check.</title>
<updated>2019-04-01T06:21:59Z</updated>
<author>
<name>qz721</name>
<email>295354721@qq.com</email>
</author>
<published>2019-04-01T06:21:59Z</published>
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<id>urn:sha1:b10039f396cb1f32cb0a4b7ee3692bf96332fc1e</id>
<content type='text'>
</content>
</entry>
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