rt-thread.git/libcpu/arm, branch v5.2.0-beta Unnamed repository; edit this file 'description' to name the repository. http://cgit.235523.xyz/rt-thread.git/atom/libcpu/arm?h=v5.2.0-beta 2025-03-17T10:25:44Z [fix]Fix cm33 compilation problem when block is turned on 2025-03-17T10:25:44Z Rbb666 zhangbingru@rt-thread.com 2025-03-17T09:39:40Z urn:sha1:355a0710a62036fd746c5f550e90e2e63ca5237c fix: add \n for addr2line hint 2025-01-08T22:54:46Z Meco Man 920369182@qq.com 2025-01-08T01:42:58Z urn:sha1:97b9cc50000bc427df9bdd9fd99ede9a0c6215b0 rzn2l-rsk support studio 2024-12-04T02:11:04Z kurisaw 2053731441@qq.com 2024-11-28T10:28:07Z urn:sha1:2c3ee65d7f9fc81af824e86f9e41cf868390be59 [libcpu][drivers] cortex-r52 abnormal takeover and software rtc naming change 2024-12-04T02:11:04Z kurisaw 2053731441@qq.com 2024-11-28T09:10:42Z urn:sha1:3f1a62cfe341ffe3f242438b52e2686379a95081 [DM/FIXUP] add cortex-m23's cpuport.h 2024-11-20T08:11:10Z GuEe-GUI 2991707448@qq.com 2024-11-20T07:10:05Z urn:sha1:5dda65c21b207c5337297f04e8e8fda3f324b47c Signed-off-by: GuEe-GUI <2991707448@qq.com> [libcpu][component] fixed the r52 kernel gcc context switch assembly 2024-11-06T08:09:52Z kurisaw 2053731441@qq.com 2024-11-06T05:07:56Z urn:sha1:2241f4676b29e7983678db5b00856c36cd1e2b3c [kernel] Specification interrupt nested level variable declaration type (#9568) 2024-10-23T21:08:29Z Yuqiang Wang yifang.wangyq@foxmail.com 2024-10-23T21:08:29Z urn:sha1:b3d59050b049f03d954273e8921f941dd806360a add readme files 2024-08-29T03:58:52Z Evlers 1425295900@qq.com 2024-08-29T03:00:40Z urn:sha1:8249e71bcccffc8d4e96b32178f1e40863656ccf [libcpu][arm][cortex-m4] allows rewrite to interrupt enable/disable api to support independent interrupts management 2024-08-29T03:58:52Z Evlers 1425295900@qq.com 2024-08-14T06:59:52Z urn:sha1:8c0f6894523d8007678ab1ab5e346a8b090a837d Correct ".cpu cortex-m4" to ".cpu cortex-m7" 2024-07-11T12:42:50Z childerxxx childerxxx@gmail.com 2024-07-11T09:20:35Z urn:sha1:d7914defddc67863033ef4b49a99601d79b9ecd0