rt-thread.git/libcpu/m16c/m16c62p/context_iar.asm, branch v3.1.0Unnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/rt-thread.git/atom/libcpu/m16c/m16c62p/context_iar.asm?h=v3.1.02013-01-08T13:05:02Zconvert end of line2013-01-08T13:05:02ZBernard Xiongbernard.xiong@gmail.com2013-01-08T13:05:02Zurn:sha1:72782e920325808bbc58fc2344fc52033479b627improve the renesas M16C porting2011-09-02T06:56:22Zdzzxzzdzzxzz@gmail.com2011-09-02T06:56:22Zurn:sha1:55a2684e5647f8f5c3454ae73c114f5068488a6d
it can be worked in NORMAL or SIMPLE calling convention
and in all the optimize level(none, low, medium, high)
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1691 bbd45198-f89e-11dd-88c7-29a3b14d5316
optimize porting for M16C2011-09-01T08:25:54Zdzzxzzdzzxzz@gmail.com2011-09-01T08:25:54Zurn:sha1:e8a462b5c7d9027efb54937e6760b05edc91e6fe
void rt_hw_context_switch(rt_uint32_t from, rt_uint32_t to);
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1688 bbd45198-f89e-11dd-88c7-29a3b14d5316
merge stack.c and interrupt.c into cpuport.c2011-09-01T08:05:21Zdzzxzzdzzxzz@gmail.com2011-09-01T08:05:21Zurn:sha1:61d969f1b9762a9a81ad821edd375e1164f75787
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1687 bbd45198-f89e-11dd-88c7-29a3b14d5316
get ready for SCONS2011-02-16T13:29:09Zdzzxzzdzzxzz@gmail.com2011-02-16T13:29:09Zurn:sha1:29db3e32951945a0cca21f4a188092fca59c5e53
change the m16c assembly extension from s34 to asm
move the m16c porting files to m16c62p directory
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1270 bbd45198-f89e-11dd-88c7-29a3b14d5316