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<title>rt-thread.git/libcpu/m16c, branch stable-v1.2.x</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/libcpu/m16c?h=stable-v1.2.x</id>
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<updated>2013-01-08T13:05:02Z</updated>
<entry>
<title>convert end of line</title>
<updated>2013-01-08T13:05:02Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2013-01-08T13:05:02Z</published>
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<id>urn:sha1:72782e920325808bbc58fc2344fc52033479b627</id>
<content type='text'>
</content>
</entry>
<entry>
<title>save texit address in to thread stack in m16c</title>
<updated>2012-09-26T06:43:35Z</updated>
<author>
<name>dzzxzz@gmail.com</name>
<email>dzzxzz@gmail.com</email>
</author>
<published>2012-09-26T06:43:35Z</published>
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<id>urn:sha1:e0a5c0ae814b43a8d8995eed8593867dea04e5d0</id>
<content type='text'>
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2308 bbd45198-f89e-11dd-88c7-29a3b14d5316
</content>
</entry>
<entry>
<title>support GNUC cross compiler(GNUM16CM32Cv1101-ELF) for renesas M16C porting</title>
<updated>2012-04-14T07:04:27Z</updated>
<author>
<name>dzzxzz@gmail.com</name>
<email>dzzxzz@gmail.com</email>
</author>
<published>2012-04-14T07:04:27Z</published>
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<id>urn:sha1:a321f3da64987acd1d1f83eba0528a2653dfc6c7</id>
<content type='text'>
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@2047 bbd45198-f89e-11dd-88c7-29a3b14d5316
</content>
</entry>
<entry>
<title>fixed a compile error while using scons+iar for m16c</title>
<updated>2011-10-07T03:00:12Z</updated>
<author>
<name>dzzxzz</name>
<email>dzzxzz@gmail.com</email>
</author>
<published>2011-10-07T03:00:12Z</published>
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<id>urn:sha1:e97c87d6a0947ff5e235d3e2c36a3d00279a78ae</id>
<content type='text'>
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1740 bbd45198-f89e-11dd-88c7-29a3b14d5316
</content>
</entry>
<entry>
<title>fixed a spelling error</title>
<updated>2011-09-09T07:30:39Z</updated>
<author>
<name>dzzxzz</name>
<email>dzzxzz@gmail.com</email>
</author>
<published>2011-09-09T07:30:39Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=f7d1ca323b4957e8ee7cc2425df9e2459594bddc'/>
<id>urn:sha1:f7d1ca323b4957e8ee7cc2425df9e2459594bddc</id>
<content type='text'>
rt_thread_switch_interrput_flag -&gt; rt_thread_switch_interrupt_flag

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1704 bbd45198-f89e-11dd-88c7-29a3b14d5316
</content>
</entry>
<entry>
<title>improve the renesas M16C porting</title>
<updated>2011-09-02T06:56:22Z</updated>
<author>
<name>dzzxzz</name>
<email>dzzxzz@gmail.com</email>
</author>
<published>2011-09-02T06:56:22Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=55a2684e5647f8f5c3454ae73c114f5068488a6d'/>
<id>urn:sha1:55a2684e5647f8f5c3454ae73c114f5068488a6d</id>
<content type='text'>
it can be worked in NORMAL or SIMPLE calling convention
and in all the optimize level(none, low, medium, high)

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1691 bbd45198-f89e-11dd-88c7-29a3b14d5316
</content>
</entry>
<entry>
<title>optimize porting for M16C</title>
<updated>2011-09-01T08:25:54Z</updated>
<author>
<name>dzzxzz</name>
<email>dzzxzz@gmail.com</email>
</author>
<published>2011-09-01T08:25:54Z</published>
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<id>urn:sha1:e8a462b5c7d9027efb54937e6760b05edc91e6fe</id>
<content type='text'>
void rt_hw_context_switch(rt_uint32_t from, rt_uint32_t to);

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1688 bbd45198-f89e-11dd-88c7-29a3b14d5316
</content>
</entry>
<entry>
<title>merge stack.c and interrupt.c into cpuport.c</title>
<updated>2011-09-01T08:05:21Z</updated>
<author>
<name>dzzxzz</name>
<email>dzzxzz@gmail.com</email>
</author>
<published>2011-09-01T08:05:21Z</published>
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<id>urn:sha1:61d969f1b9762a9a81ad821edd375e1164f75787</id>
<content type='text'>
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1687 bbd45198-f89e-11dd-88c7-29a3b14d5316
</content>
</entry>
<entry>
<title>add context_iar.S for SCONS</title>
<updated>2011-02-16T13:47:44Z</updated>
<author>
<name>dzzxzz</name>
<email>dzzxzz@gmail.com</email>
</author>
<published>2011-02-16T13:47:44Z</published>
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<id>urn:sha1:fac560d432d21a4aa285fa720893b7aebbbb015e</id>
<content type='text'>
actually context_iar.S is the same as context_iar.asm
but context_iar.S is used for SCONS, and context_iar.asm is used for IAR

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1272 bbd45198-f89e-11dd-88c7-29a3b14d5316
</content>
</entry>
<entry>
<title>get ready for SCONS</title>
<updated>2011-02-16T13:29:09Z</updated>
<author>
<name>dzzxzz</name>
<email>dzzxzz@gmail.com</email>
</author>
<published>2011-02-16T13:29:09Z</published>
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<id>urn:sha1:29db3e32951945a0cca21f4a188092fca59c5e53</id>
<content type='text'>
change the m16c assembly extension from s34 to asm
move the m16c porting files to m16c62p directory


git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1270 bbd45198-f89e-11dd-88c7-29a3b14d5316
</content>
</entry>
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