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<title>rt-thread.git/libcpu/mips/gs232/ls1b.h, branch copilot/remove-finish-function-export-alias</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/libcpu/mips/gs232/ls1b.h?h=copilot%2Fremove-finish-function-export-alias</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/libcpu/mips/gs232/ls1b.h?h=copilot%2Fremove-finish-function-export-alias'/>
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<updated>2021-03-27T09:51:56Z</updated>
<entry>
<title>[libcpu] auto formatted</title>
<updated>2021-03-27T09:51:56Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2021-03-27T09:51:56Z</published>
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<id>urn:sha1:6c907c3a477b1f34ca1adb277748c3306110cabf</id>
<content type='text'>
</content>
</entry>
<entry>
<title>ls1b: fix the count of GPIO IRQ and improvement the IRQ of UARTS.</title>
<updated>2021-01-31T14:33:58Z</updated>
<author>
<name>michael</name>
<email>michael5hzg@gmail.com</email>
</author>
<published>2021-01-31T14:33:58Z</published>
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<id>urn:sha1:242530ae7017dbe0b5efae7796d6914c3c57f9ad</id>
<content type='text'>
from 1b manunal we know it have 64 GPIO IRQ and 12 UARTS
</content>
</entry>
<entry>
<title>[libcpu] mips: Merge loongson_1 into gs232</title>
<updated>2019-12-11T07:24:42Z</updated>
<author>
<name>Jiaxun Yang</name>
<email>jiaxun.yang@flygoat.com</email>
</author>
<published>2019-12-06T16:55:46Z</published>
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<id>urn:sha1:9ef986929cb2c39485da89ec39ad80316a5a9965</id>
<content type='text'>
Previously Loongson 1B and Loongson 1C have their own libcpu
implemention, but they're almost identical. So we merge them
into gs232 and adapt to new common code.

Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
</content>
</entry>
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