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<title>rt-thread.git/libcpu/risc-v/common/cpuport.c, branch copilot/create-ai-agent-rules</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/libcpu/risc-v/common/cpuport.c?h=copilot%2Fcreate-ai-agent-rules</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/libcpu/risc-v/common/cpuport.c?h=copilot%2Fcreate-ai-agent-rules'/>
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<updated>2023-08-09T02:34:25Z</updated>
<entry>
<title>rt_hw_cpu_shutdown: implement default weak function</title>
<updated>2023-08-09T02:34:25Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2023-08-07T16:42:10Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=c6a2f5b7bdee378cc868ee9284e760ebbdf635f0'/>
<id>urn:sha1:c6a2f5b7bdee378cc868ee9284e760ebbdf635f0</id>
<content type='text'>
and remvoe duplicated default functions in each cpu/bsp level
</content>
</entry>
<entry>
<title>[libcpu][riscv]整合libcpu/riscv中的移植文件 提供一份公共代码于common (#6941)</title>
<updated>2023-03-01T06:32:43Z</updated>
<author>
<name>Yaochenger</name>
<email>75192526+Yaochenger@users.noreply.github.com</email>
</author>
<published>2023-03-01T06:32:43Z</published>
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<id>urn:sha1:b9e4fcfc6878aa05cca277ea3557299e59207965</id>
<content type='text'>
整合libcpu/riscv中的移植文件 提供一份公共代码于common

在提交本pr时，除hpmicro的内核，rv32内核bsp已完成去除大部分的冗余，大部分代码采用common中的实现。本pr的作用是进一步统一common中的文件，从而提供一份公用代码，新移植的RV32内核的BSP可以全部使用common代码。

- 在common中提供一份公用文件：interrupt_gcc.S
- 修改原有的文件，将原有的中断中上下文切换代码替换为interrupt_gcc.S
- 基于上述修改，修改仓库中risc-v内核的BSP与移植相关的部分 (主要包含中断入口函数 中断栈等)
- 在common中提供一份公用文件：trap_common.c；提供统一中断入口函数，中断入口函数初始化，中断入口注册等函数，并完善异常时的信息输出

- 在common中提供一份公用文件：rt_hw_stack_frame.h；将栈帧结构体剥离，供用户使用

- 在上述工作完成后，在上述工作的基础上测试仓库中risc-v内核的BSP

- 完善函数中的命名，完善中断栈的获取

- 提供一份详细的基于现有common文件的移植指南

  #### 在什么测试环境下测试通过 

- 1.CH32V307V-R1-R0
- 2.CH32V208W-R0-1V4
- 3.HPM6750EVKMINI
- 4.GD32VF103V-EVAL
- 5.qemu(CORE-V-MCU )

&gt; 与上述开发板使用同样芯片的BSP均测试通过

在CH32V307V-R1-R0与HPM6750EVKMINI上基于现有移植文件进行多线程复杂场景下的长时间测试，测试过程系统运行正常。</content>
</entry>
<entry>
<title>[libcpu][riscv]移除ch32中的冗余文件,使用common下的文件 (#6813)</title>
<updated>2023-01-05T02:06:09Z</updated>
<author>
<name>Yaochenger</name>
<email>75192526+Yaochenger@users.noreply.github.com</email>
</author>
<published>2023-01-05T02:06:09Z</published>
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<id>urn:sha1:b99769f68635e2644e3ad5082409948c15778372</id>
<content type='text'>
* [libcpu][riscv]移除ch32中的冗余文件,使用common下的文件

* 修正cpuport.h宏定义

* 规范宏定义格式</content>
</entry>
<entry>
<title>[rtdef] use lower-case to define attributes (#6728)</title>
<updated>2022-12-11T18:12:03Z</updated>
<author>
<name>Man, Jianting (Meco)</name>
<email>920369182@qq.com</email>
</author>
<published>2022-12-11T18:12:03Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=99bdf978d7fe4ec18ed50a639e15b254825c871b'/>
<id>urn:sha1:99bdf978d7fe4ec18ed50a639e15b254825c871b</id>
<content type='text'>
* [rtdef] rename RT_WEAK attribute as rt_weak

* [rtdef] rename RT_USED attribute as rt_used

* [rtdef] rename RT_SECTION attribute as rt_section

* [rtdef] rename ALIGN attribute as rt_align

* [legacy] add RT_USED ALIGN RT_SECTION RT_WEAK as legacy support</content>
</entry>
<entry>
<title>sync branch rt-smart. (#6641)</title>
<updated>2022-12-03T04:07:44Z</updated>
<author>
<name>guo</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-12-03T04:07:44Z</published>
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<id>urn:sha1:ecf2d8215961ca7c539132b62a72df6072cc3e14</id>
<content type='text'>
* Synchronize the code of the rt mart branch to the master branch.
  * TTY device
  * Add lwP code from rt-smart
  * Add vnode in DFS, but DFS will be re-write for rt-smart
  * There are three libcpu for rt-smart:
    * arm/cortex-a, arm/aarch64
    * riscv64

Co-authored-by: Rbb666 &lt;zhangbingru@rt-thread.com&gt;
Co-authored-by: zhkag &lt;zhkag@foxmail.com&gt;</content>
</entry>
<entry>
<title>WCH CH569W-R0-1v0 evt board bsp port, first version (#6167)</title>
<updated>2022-07-30T06:10:51Z</updated>
<author>
<name>emuzit</name>
<email>98307908+emuzit@users.noreply.github.com</email>
</author>
<published>2022-07-30T06:10:51Z</published>
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<id>urn:sha1:c802fcdcf821590f193608dda2233aecb722d2d6</id>
<content type='text'>
WCH CH569W-R0-1v0 evt board bsp port, first version

dev/test under Ubuntu 20.04
toolchain from MounRiver_Studio_Community_Linux_x64_V120

tested drivers : SysTick, gpio, gpio interrupt, uart1 (RX interrupt, TX polling)

libcpu/risc-v/SConscript :
group includes rtconfig.CPU only if folder exists

libcpu/risc-v/common/cpuport.c/rt_hw_context_switch_interrupt() :
make it RT_WEAK for customization</content>
</entry>
<entry>
<title>uniform code writing-disable interrupt</title>
<updated>2022-04-20T06:22:43Z</updated>
<author>
<name>thewon86</name>
<email>zhongyong0104@sina.com</email>
</author>
<published>2022-04-20T02:56:11Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=f5b0bfd3f4f450424b5bc1f084959d0436c8a6e6'/>
<id>urn:sha1:f5b0bfd3f4f450424b5bc1f084959d0436c8a6e6</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu] auto formatted</title>
<updated>2021-03-27T09:51:56Z</updated>
<author>
<name>Meco Man</name>
<email>920369182@qq.com</email>
</author>
<published>2021-03-27T09:51:56Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=6c907c3a477b1f34ca1adb277748c3306110cabf'/>
<id>urn:sha1:6c907c3a477b1f34ca1adb277748c3306110cabf</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Merge pull request #4043 from zhangsz0516/zhangsz_1120</title>
<updated>2020-11-23T09:40:34Z</updated>
<author>
<name>Bernard Xiong</name>
<email>bernard.xiong@gmail.com</email>
</author>
<published>2020-11-23T09:40:34Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=b7dd3cae098e3427443d4238c883ca7631980ce8'/>
<id>urn:sha1:b7dd3cae098e3427443d4238c883ca7631980ce8</id>
<content type='text'>
[libcpu][update]重启与关机函数：rt_hw_cpu_shutdown、rt_hw_cpu_reset，补充WEAK属性</content>
</entry>
<entry>
<title>[libcpu/risc-v][K210] add FPU support</title>
<updated>2020-11-20T05:53:50Z</updated>
<author>
<name>tangweikang</name>
<email>tangweikang@rt-thread.com</email>
</author>
<published>2020-11-20T04:05:37Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=c8deffcf56df79cbf817b02cb1d9b62c61565022'/>
<id>urn:sha1:c8deffcf56df79cbf817b02cb1d9b62c61565022</id>
<content type='text'>
</content>
</entry>
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