rt-thread.git/libcpu/risc-v/common64/cpuport.c, branch copilot/create-dfs2-documentation Unnamed repository; edit this file 'description' to name the repository. http://cgit.235523.xyz/rt-thread.git/atom/libcpu/risc-v/common64/cpuport.c?h=copilot%2Fcreate-dfs2-documentation 2025-02-22T19:17:54Z libcpu: riscv: fixed ARCH_RISCV_VECTOR issue 2025-02-22T19:17:54Z kenneth.liu kenneth.liu@sophgo.com 2025-01-24T03:35:19Z urn:sha1:2be83d5cadff3a3b7a3015b90ec138b7d4614627 description: Using the vector instruction set to trigger an illegal instruction exception when ARCH_SISCV_VECTOR=y. analysis: When initializing the thread stack, the rt_cw_stack_init function did not enable VS for SSTATUS. Solution: When ARCH_SISCV_VECTOR=y, increment the initial value of sstatus by 0x600(SSTATUS_VS). Signed-off-by: Liu Gui <kenneth.liu@sophgo.com> feat: remove redundant codes under virt64, c906 2024-09-13T21:35:00Z Shell smokewood@qq.com 2024-09-12T03:14:12Z urn:sha1:57d002b25e26a5df950b087f0ea2dc7b6feeb7e3 Changes: - create new folder name `common64` and save all common codes of rv64 inside Signed-off-by: Shell <smokewood@qq.com>