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<title>rt-thread.git/libcpu/risc-v/common64/mmu.h, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
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<updated>2026-09-15T14:57:55Z</updated>
<entry>
<title>[libcpu][risc-v]Feat: Add mmu SV48/SV57 mode support and add mmu_demo for C908.</title>
<updated>2026-09-15T14:57:55Z</updated>
<author>
<name>guanxi.cgh</name>
<email>guanxi.cgh@alibaba-inc.com</email>
</author>
<published>2026-08-25T13:25:54Z</published>
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<id>urn:sha1:a5d9dc884b6f5f61b06664bbf745356416de98cf</id>
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</entry>
<entry>
<title>[libcpu-riscv]: [surpport SMP]: Add SMP support for qemu-virt64-riscv</title>
<updated>2025-12-04T07:42:09Z</updated>
<author>
<name>Tm-C-mT</name>
<email>490534897@qq.com</email>
</author>
<published>2025-12-03T10:38:26Z</published>
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<id>urn:sha1:acef64ed2a30bd1b2c832114dde7d9b1f5b9a509</id>
<content type='text'>
1.Add the necessary function declarations for SMP enablement and implement the corresponding
functionalities, including rt_hw_secondary_cpu_up, secondary_cpu_entry, rt_hw_local_irq_disable,
rt_hw_local_irq_enable, rt_hw_secondary_cpu_idle_exec, rt_hw_spin_lock_init, rt_hw_spin_lock,
rt_hw_spin_unlock, rt_hw_ipi_send, rt_hw_interrupt_set_priority, rt_hw_interrupt_get_priority,
rt_hw_ipi_init, rt_hw_ipi_handler_install, and rt_hw_ipi_handler.

2.In the two functions (rt_hw_context_switch_to and rt_hw_context_switch) in context_gcc.S,
add a call to rt_cpus_lock_status_restore to update the scheduler information.

3.If the MMU is enabled, use the .percpu section and record different hartids by configuring
special page tables; if the MMU is not enabled, record them directly in the satp register.
Additionally, add dynamic startup based on core configuration.The .percpu section is only used
when both ARCH_MM_MMU and RT_USING_SMP are enabled. However, there is a certain amount of space
waste since no macro guard is added for it in the link script currently.

4.The physical memory of QEMU started in CI is 128MB, so RT_HW_PAGE_END is modified from the
original +256MB to +128MB. Modify the SConscript file under the common64 directory to include
common/atomic_riscv.c in the compilation process.

Signed-off-by: Mengchen Teng &lt;teng_mengchen@163.com&gt;
</content>
</entry>
<entry>
<title>libcpu: cleanup undefined rt_hw_mmu_kernel_map_init (#10177)</title>
<updated>2025-04-10T23:54:21Z</updated>
<author>
<name>Chen Wang</name>
<email>unicorn_wang@outlook.com</email>
</author>
<published>2025-04-10T23:54:21Z</published>
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<id>urn:sha1:5c9f61879c8e745c89aaa728cfd86e6e9e912914</id>
<content type='text'>
* libcpu: cleanup undefined rt_hw_mmu_kernel_map_init

rt_hw_mmu_kernel_map_init() is declared in header files but
no definition found, cleanup the code.

Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;

* bsp: allwinner: d1: remove calling of rt_hw_mmu_kernel_map_init

rt_hw_mmu_kernel_map_init is an undefined function, calling it
is meaningless.

Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;

---------

Signed-off-by: Chen Wang &lt;unicorn_wang@outlook.com&gt;</content>
</entry>
<entry>
<title>[bugfix][risc-v]fix the PPN length error in GET_PPN(pte). (#10020)</title>
<updated>2025-02-28T00:23:46Z</updated>
<author>
<name>Guorui Li</name>
<email>liguorui1213@163.com</email>
</author>
<published>2025-02-28T00:23:46Z</published>
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<id>urn:sha1:8adae0725d9fa37665ad9b5d83359705b1a9bc8c</id>
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</entry>
<entry>
<title>feat: remove redundant codes under virt64, c906</title>
<updated>2024-09-13T21:35:00Z</updated>
<author>
<name>Shell</name>
<email>smokewood@qq.com</email>
</author>
<published>2024-09-12T03:14:12Z</published>
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<id>urn:sha1:57d002b25e26a5df950b087f0ea2dc7b6feeb7e3</id>
<content type='text'>
Changes:

- create new folder name `common64` and save all common codes of rv64
  inside

Signed-off-by: Shell &lt;smokewood@qq.com&gt;
</content>
</entry>
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