rt-thread.git/libcpu/risc-v/common, branch riscv64Unnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/rt-thread.git/atom/libcpu/risc-v/common?h=riscv642024-04-30T12:11:47ZFix compiling eror in hpmicro bsp (#8889)2024-04-30T12:11:47ZFan Yang93824713+helloeagleyang@users.noreply.github.com2024-04-30T12:11:47Zurn:sha1:c21ba6985d5a9d6f6926799ada4faa92c20cb8a0
- added 'DEVICE' to rtconfig.py
- fixed compiling error cuased by change in interrupt_gcc.S
Signed-off-by: Fan YANG <fan.yang@hpmicro.com>[libcpu][SConscript]规范group名为libcpu2024-02-20T00:39:05ZMeco Man920369182@qq.com2024-02-19T19:33:47Zurn:sha1:6d4503363a352c72148bc91da3026f0db096f119add libcpu/risc-v/rv64 (#8511)2024-01-28T05:39:39Zflyingcysflyingcys@163.com2024-01-28T05:39:39Zurn:sha1:3f41bd95d10bf02de049290434af587c5586fde5[libcpu][risc-v][common] Fix application crash on risc-v soc if FPU is2023-08-12T01:20:28ZFan YANGfan.yang@hpmicro.com2023-08-11T13:05:52Zurn:sha1:5308cc47161d8e2f9fdb680738e023ef16af1e2b
enabled
- Defined ARCH_RISCV_FPU once the __riscv_flen macro was detected
Signed-off-by: Fan YANG <fan.yang@hpmicro.com>
[libcpu][risc-v][common] Avoid using t0 before being saved2023-08-09T05:07:11ZFan YANGfan.yang@hpmicro.com2023-08-09T02:51:32Zurn:sha1:5ac509b6d031b29e2d95c52fc179771e62664378
- Fixed the issue that t0 was modified unexpectedly before being saved
Signed-off-by: Fan YANG <fan.yang@hpmicro.com>
rt_hw_cpu_shutdown: implement default weak function2023-08-09T02:34:25ZMeco Man920369182@qq.com2023-08-07T16:42:10Zurn:sha1:c6a2f5b7bdee378cc868ee9284e760ebbdf635f0
and remvoe duplicated default functions in each cpu/bsp level
[risc-v][libcpu] 删去无用局部变量 (#7634)2023-06-07T21:04:12ZLiu,Yuan89723088+linshire@users.noreply.github.com2023-06-07T21:04:12Zurn:sha1:1d8165851b7fef9a4ec4903154b5b7234fe141b5[atomic] add stdc atomic detection. (#7536)2023-05-20T15:41:29ZBernard Xiongbernard.xiong@gmail.com2023-05-20T15:41:29Zurn:sha1:4b4c3c85f2ac82f12d5527ef1a6794b2189a9eee[utest][atomic]添加返回值测试 (#7124)2023-03-30T03:06:21ZYaochenger75192526+Yaochenger@users.noreply.github.com2023-03-30T03:06:21Zurn:sha1:38eb3fc40f817ea1dce5223a9bac0d2d3b578bd2
* [utest][atomic]添加返回值测试
[bsp]fix esp32_c3 compile error (#7107)2023-03-29T11:01:26Zflyingcysflyingcys@163.com2023-03-29T11:01:26Zurn:sha1:0cf3bcf49506ee4a8c5444284b0c9dd5afbf2df3
* fix rt_hw_interrupt_install return value
* add __rt_rvstack