rt-thread.git/libcpu/risc-v/t-head/c906/mmu.c, branch riscv64

feat: support ARCH_REMAP_KERNEL on libcpu/c906 (#9123) (#9171)

2024-07-11T03:46:26Z

feat: [libcpu/c906] support ARCH_REMAP_KERNEL This change was necessary to enable the remapping of the kernel image to a high virtual address region on the c906 platform. Changes: - Introduced new configuration options `ARCH_REMAP_KERNEL`, and `ARCH_USING_ASID` under the `ARCH_RISCV64` section. - Updated MMU initialization and switching functions to incorporate remapping handling. - Modified page table setup for proper memory attribute settings. - Added support for early memory setup, kernel remapping - Added conditional compilation for ASID support in the `rt_aspace` struct, since this is not enable currently for most architecture. Signed-off-by: Shell Co-authored-by: Shell

[libcpu] rv64: support for ARCH_REMAP_KERNEL (#9067)

2024-06-18T03:15:59Z

* [libcpu] support for ARCH_REMAP_KERNEL These changes introduce support for the ARCH_REMAP_KERNEL configuration, which isolates kernel space in high virtual address regions. This feature is necessary to enhance memory protection and management by segregating user and kernel spaces more effectively. Changes: - Updated conditional macros to check for ARCH_REMAP_KERNEL instead of ARCH_KERNEL_IN_HIGH_VA in board initialization files to reflect the new configuration option. - Modified qemu-virt64-riscv Kconfig and SConstruct files to include and utilize ARCH_REMAP_KERNEL. - Created a new linker script `link_smart.lds` for smart linking in qemu-virt64-riscv. - Updated rtconfig.py to use a more flexible execution path setup. - Enhanced user address space definitions in `lwp_arch.h` to support the new virtual address mappings. - Adjusted kernel memory initialization and mapping logic in `c906/mmu.c` and `virt64/mmu.c` to account for high virtual address regions. - Added Kconfig option to enable ARCH_REMAP_KERNEL for RISCV64 architectures. - Enhanced memory setup functions to support new mapping scheme, including updates to early page table setup and address relocation logic. These modifications ensure that the system can utilize high memory addresses for the kernel, improving memory isolation and system stability. Signed-off-by: Shell * fixup: CI run failed * bsp: default config without using smart * fixup: static checks * restore rt_hw_mmu_kernel_map_init for D1 --------- Signed-off-by: Shell

[bsp][cv1800b] fix a int-conversion warning

2024-03-19T12:10:43Z

Signed-off-by: LiuLingze

Sync dfs lwp (#8123)

2023-10-17T05:07:59Z

[libcpu/riscv/c906] fix "next_asid" type error (#7031)

2023-03-09T12:25:54Z

MAX_ASID最大为0x10000，在next_asid==MAX_ASID时进入下一个generation。因此next_asid不能只有16位，否则将不能进入下一个generation。修改rt_uint16_t为rt_uint32_t。

[fixup] add cache maintenance ops;

2023-02-21T00:48:49Z

fix bugs on cache maintenance when starting user app

[rt-smart] PV_OFFSET as a variable (#6904)

2023-02-14T15:08:32Z

* [rt-smart/mem] remove pv_offset * [rt-smart] list kernel space command * [rt-smart] restore ioremap region * [revert] restore kernel space isolation * [rt-smart/pv_off] code format * [rt-smart] add get_pvoff() * [pvoffset] pvoff as constant for C codes * [pvoff] pvoff as interfaces

为c906添加asid支持 (#6870)

2023-01-28T18:08:40Z

* [rt-smart] asid for c906

[rt-smart] porting c906 and D1s to mm (#6848)

2023-01-16T00:24:03Z

* [rv64/bsp] porting to mm * [mm] report more info for debugging * [fix] code format * [libcpu/c906] porting to RTOS * [fix] using rtdbg api * [fix] add return * [fix] report more information for debugging * [fix] use assert 0 for unrecoverable error

[rt-smart] kernel virtual memory management layer (#6809)

2023-01-09T02:08:55Z

synchronize virtual memory system works. adding kernel virtual memory management layer for page-based MMU enabled architecture porting libcpu MMU codes porting lwp memory related codes