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<title>rt-thread.git/libcpu/risc-v/t-head/c906/plic.h, branch copilot/remove-vbus-code-implementation</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/libcpu/risc-v/t-head/c906/plic.h?h=copilot%2Fremove-vbus-code-implementation</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/libcpu/risc-v/t-head/c906/plic.h?h=copilot%2Fremove-vbus-code-implementation'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/'/>
<updated>2024-09-11T22:06:51Z</updated>
<entry>
<title>feat: libcpu/risc-v: unify interrupt &amp; IO on rv64</title>
<updated>2024-09-11T22:06:51Z</updated>
<author>
<name>Shell</name>
<email>smokewood@qq.com</email>
</author>
<published>2024-09-02T10:02:15Z</published>
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<id>urn:sha1:e244c196c4f1f5a867891df303476947a7769876</id>
<content type='text'>
This patch aims to unify the two currently separated RISC-V 64-bit
architecture ports, 'virt64' and 'c906', into a single generic
'common64' port. The changes include renaming files and updating
includes to use a unified 'interrupt.h' header, as well as making
adjustments to IO and trap handling to be more consistent between the
two architectures.

Changes:
- Renamed 'rt_interrupt.h' to 'interrupt.h' and updated includes accordingly.
- Unified IO register access functions in 'riscv_io.h'.
- Added 'opcode.h' for portable assembly support.
- Updated 'plic.c' and 'plic.h' to handle interrupts in a unified manner.
- Modified 'trap.c' to handle exceptions and interrupts consistently for 'rv64'.

Signed-off-by: Shell &lt;smokewood@qq.com&gt;
</content>
</entry>
<entry>
<title>[libcpu/risc-v/c906] add ioremap &amp;&amp; default param (#7345)</title>
<updated>2023-04-24T01:21:15Z</updated>
<author>
<name>flyingcys</name>
<email>flyingcys@163.com</email>
</author>
<published>2023-04-24T01:21:15Z</published>
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<id>urn:sha1:cbedb6b40bea151faaa307225d8b594bb3573ec2</id>
<content type='text'>
</content>
</entry>
<entry>
<title>sync branch rt-smart. (#6641)</title>
<updated>2022-12-03T04:07:44Z</updated>
<author>
<name>guo</name>
<email>guozhanxin@rt-thread.com</email>
</author>
<published>2022-12-03T04:07:44Z</published>
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<id>urn:sha1:ecf2d8215961ca7c539132b62a72df6072cc3e14</id>
<content type='text'>
* Synchronize the code of the rt mart branch to the master branch.
  * TTY device
  * Add lwP code from rt-smart
  * Add vnode in DFS, but DFS will be re-write for rt-smart
  * There are three libcpu for rt-smart:
    * arm/cortex-a, arm/aarch64
    * riscv64

Co-authored-by: Rbb666 &lt;zhangbingru@rt-thread.com&gt;
Co-authored-by: zhkag &lt;zhkag@foxmail.com&gt;</content>
</entry>
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