rt-thread.git/libcpu/risc-v/t-head/c906/riscv_mmu.h, branch copilot/remove-vbus-code-implementation

feat: libcpu/risc-v: unify mmu related works

2024-09-11T22:06:51Z

These changes are designed to standardize the memory management across 'virt64' and 'c906', ensuring efficient handling of address spaces and page tables. Changes: - Creation of ASID management files (`asid.c`) for both 'c906' and 'virt64' architectures, which is essential for maintaining stability. - Extensive updates to the MMU configuration and handling in `mmu.c` and `mmu.h` files. - Addition of functions to manage ASID allocation and switching of page tables. - For c906, accommodated the early memory setup to the one from virt64. Signed-off-by: Shell

[libcpu/c906]与virt同步 (#9095)

2024-06-26T04:16:37Z

[libcpu] rv64: support for ARCH_REMAP_KERNEL (#9067)

2024-06-18T03:15:59Z

* [libcpu] support for ARCH_REMAP_KERNEL These changes introduce support for the ARCH_REMAP_KERNEL configuration, which isolates kernel space in high virtual address regions. This feature is necessary to enhance memory protection and management by segregating user and kernel spaces more effectively. Changes: - Updated conditional macros to check for ARCH_REMAP_KERNEL instead of ARCH_KERNEL_IN_HIGH_VA in board initialization files to reflect the new configuration option. - Modified qemu-virt64-riscv Kconfig and SConstruct files to include and utilize ARCH_REMAP_KERNEL. - Created a new linker script `link_smart.lds` for smart linking in qemu-virt64-riscv. - Updated rtconfig.py to use a more flexible execution path setup. - Enhanced user address space definitions in `lwp_arch.h` to support the new virtual address mappings. - Adjusted kernel memory initialization and mapping logic in `c906/mmu.c` and `virt64/mmu.c` to account for high virtual address regions. - Added Kconfig option to enable ARCH_REMAP_KERNEL for RISCV64 architectures. - Enhanced memory setup functions to support new mapping scheme, including updates to early page table setup and address relocation logic. These modifications ensure that the system can utilize high memory addresses for the kernel, improving memory isolation and system stability. Signed-off-by: Shell * fixup: CI run failed * bsp: default config without using smart * fixup: static checks * restore rt_hw_mmu_kernel_map_init for D1 --------- Signed-off-by: Shell

[ci] open ci check with function declaration warning (#8546)

2024-02-21T03:45:04Z

[smart] fixup: mmap support (#8154)

2023-10-20T05:28:20Z

Signed-off-by: Shell

Sync dfs lwp (#8123)

2023-10-17T05:07:59Z

[libcpu/risc-v] support noncached normal memory (#7051)

2023-03-16T02:26:55Z

* [libcpu/risc-v] support noncached normal memory * [mm] check before dereference in _fetch_page * [mm] add comments on ioremap * [ioremap] report more info on failed

为c906添加asid支持 (#6870)

2023-01-28T18:08:40Z

* [rt-smart] asid for c906

[rt-smart] porting c906 and D1s to mm (#6848)

2023-01-16T00:24:03Z

* [rv64/bsp] porting to mm * [mm] report more info for debugging * [fix] code format * [libcpu/c906] porting to RTOS * [fix] using rtdbg api * [fix] add return * [fix] report more information for debugging * [fix] use assert 0 for unrecoverable error

[rt-smart] kernel virtual memory management layer (#6809)

2023-01-09T02:08:55Z

synchronize virtual memory system works. adding kernel virtual memory management layer for page-based MMU enabled architecture porting libcpu MMU codes porting lwp memory related codes