rt-thread.git/libcpu/risc-v/t-head/c906, branch copilot/remove-vbus-code-implementation

[kernel] Specification interrupt nested level variable declaration type (#9568)

2024-10-23T21:08:29Z

feat: remove redundant codes under virt64, c906

2024-09-13T21:35:00Z

Changes: - create new folder name `common64` and save all common codes of rv64 inside Signed-off-by: Shell

feat: libcpu/risc-v: unify low-level bringups

2024-09-11T22:06:51Z

This patch consolidates the separated architecture-specific code for rv64 (virt64 and c906) under a more unified approach. The changes aim to enhance maintainability and code reuse, reducing duplication between these two architectures while adding small improvements in porting compatibility. Changes: - Modified build scripts (SConscript) for both virt64 and c906 to remove ASID and vector dependencies when not required. - Updated c906's sbi.c and sbi.h to use standard integer types (uint32_t) and include the missing header. - Unified inline function declaration for `sbi_call` across both c906 and virt64 using `rt_inline`. - Disabled FPU and vector in c906's startup assembly file, aligning it with the virt64 handling. - Corrected syscall handler type definitions in c906 for consistency. Signed-off-by: Shell

feat: libcpu/risc-v: unify interrupt & IO on rv64

2024-09-11T22:06:51Z

This patch aims to unify the two currently separated RISC-V 64-bit architecture ports, 'virt64' and 'c906', into a single generic 'common64' port. The changes include renaming files and updating includes to use a unified 'interrupt.h' header, as well as making adjustments to IO and trap handling to be more consistent between the two architectures. Changes: - Renamed 'rt_interrupt.h' to 'interrupt.h' and updated includes accordingly. - Unified IO register access functions in 'riscv_io.h'. - Added 'opcode.h' for portable assembly support. - Updated 'plic.c' and 'plic.h' to handle interrupts in a unified manner. - Modified 'trap.c' to handle exceptions and interrupts consistently for 'rv64'. Signed-off-by: Shell

feat: libcpu/risc-v: unify mmu related works

2024-09-11T22:06:51Z

These changes are designed to standardize the memory management across 'virt64' and 'c906', ensuring efficient handling of address spaces and page tables. Changes: - Creation of ASID management files (`asid.c`) for both 'c906' and 'virt64' architectures, which is essential for maintaining stability. - Extensive updates to the MMU configuration and handling in `mmu.c` and `mmu.h` files. - Addition of functions to manage ASID allocation and switching of page tables. - For c906, accommodated the early memory setup to the one from virt64. Signed-off-by: Shell

feat: libcpu/risc-v: unify context on c906, virt64

2024-09-11T22:06:51Z

Changes: - added config for NEW_CTX_SWITCH - used new context on c906 sched switch routine - update _rt_hw_stack_init to fit into NEW_CTX_SWITCH - separated vector ctx from the generic Signed-off-by: Shell

rename c906 FPU macro (#9290)

2024-08-27T04:46:41Z

1. 修改 ENABLE_FPU 为 ARCH_RISCV_FPU，与libcpu/common 保持统一 2. 对 bsp/cvitek/cv18xx_risc-v 中增加使能 ARCH_RISCV_FPU 的动作。解决了 issue #9075

[libcpu/rv64] feat: unify tick.c

2024-07-15T04:06:39Z

The changes unify the tick.c implementations for all risc-v64 architectures, leveraging the CPUTIME feature. This refactoring was necessary to streamline the codebase, and ensure consistent timer handling across different platforms. Changes: - Updated `Kconfig` in `bsp/cvitek/cv18xx_risc-v` to fix formatting issues. - Updated .config for BSPs to update `CPUTIME_TIMER_FREQ` - Updated header of for API `riscv_cputime_init` - Initialized riscv timer on `rt_hw_tick_init` - Refactored `tick.c` and `tick.h` in `libcpu/risc-v/t-head/c906` and `libcpu/risc-v/virt64`: - Replaced direct use of `rdtime` with `clock_cpu_gettime`. - Removed redundant timer frequency definitions. - Added static assertions to check the value of `CPUTIME_TIMER_FREQ`. - Initialized `tick_cycles` based on `CPUTIME_TIMER_FREQ`. - Integrated `ktime` support for tick initialization. Signed-off-by: Shell Reviewed-on: https://github.com/RT-Thread/rt-thread/pull/9164 Reviewed-by: Chen Wang

feat: support ARCH_REMAP_KERNEL on libcpu/c906 (#9123)

2024-07-11T03:00:04Z

feat: [libcpu/c906] support ARCH_REMAP_KERNEL This change was necessary to enable the remapping of the kernel image to a high virtual address region on the c906 platform. Changes: - Introduced new configuration options `ARCH_REMAP_KERNEL`, and `ARCH_USING_ASID` under the `ARCH_RISCV64` section. - Updated MMU initialization and switching functions to incorporate remapping handling. - Modified page table setup for proper memory attribute settings. - Added support for early memory setup, kernel remapping - Added conditional compilation for ASID support in the `rt_aspace` struct, since this is not enable currently for most architecture. Signed-off-by: Shell

[libcpu/c906]与virt同步 (#9095)

2024-06-26T04:16:37Z