rt-thread.git/libcpu/risc-v/t-head/c906, branch v5.3.0

Ensure that c906 uses only the Xuantie MMU properties

2026-08-21T08:51:33Z

fix[libcpu][risc-v]:

2026-02-26T09:26:47Z

- Implement _noncache() and _cache() function features; - Correct rt_hw_mmu_setup function for NORMAL_NOCACHE_MEM type property configuration; - Update C908/C906 PTE macro definition configuration;

chore: fix typo in components and libcpu

2026-02-13T13:54:59Z

Reorganize Group names in build system for clarity and IDE integration #10923

2025-11-16T03:40:53Z

[kernel] Specification interrupt nested level variable declaration type (#9568)

2024-10-23T21:08:29Z

feat: remove redundant codes under virt64, c906

2024-09-13T21:35:00Z

Changes: - create new folder name `common64` and save all common codes of rv64 inside Signed-off-by: Shell

feat: libcpu/risc-v: unify low-level bringups

2024-09-11T22:06:51Z

This patch consolidates the separated architecture-specific code for rv64 (virt64 and c906) under a more unified approach. The changes aim to enhance maintainability and code reuse, reducing duplication between these two architectures while adding small improvements in porting compatibility. Changes: - Modified build scripts (SConscript) for both virt64 and c906 to remove ASID and vector dependencies when not required. - Updated c906's sbi.c and sbi.h to use standard integer types (uint32_t) and include the missing header. - Unified inline function declaration for `sbi_call` across both c906 and virt64 using `rt_inline`. - Disabled FPU and vector in c906's startup assembly file, aligning it with the virt64 handling. - Corrected syscall handler type definitions in c906 for consistency. Signed-off-by: Shell

feat: libcpu/risc-v: unify interrupt & IO on rv64

2024-09-11T22:06:51Z

This patch aims to unify the two currently separated RISC-V 64-bit architecture ports, 'virt64' and 'c906', into a single generic 'common64' port. The changes include renaming files and updating includes to use a unified 'interrupt.h' header, as well as making adjustments to IO and trap handling to be more consistent between the two architectures. Changes: - Renamed 'rt_interrupt.h' to 'interrupt.h' and updated includes accordingly. - Unified IO register access functions in 'riscv_io.h'. - Added 'opcode.h' for portable assembly support. - Updated 'plic.c' and 'plic.h' to handle interrupts in a unified manner. - Modified 'trap.c' to handle exceptions and interrupts consistently for 'rv64'. Signed-off-by: Shell

feat: libcpu/risc-v: unify mmu related works

2024-09-11T22:06:51Z

These changes are designed to standardize the memory management across 'virt64' and 'c906', ensuring efficient handling of address spaces and page tables. Changes: - Creation of ASID management files (`asid.c`) for both 'c906' and 'virt64' architectures, which is essential for maintaining stability. - Extensive updates to the MMU configuration and handling in `mmu.c` and `mmu.h` files. - Addition of functions to manage ASID allocation and switching of page tables. - For c906, accommodated the early memory setup to the one from virt64. Signed-off-by: Shell

feat: libcpu/risc-v: unify context on c906, virt64

2024-09-11T22:06:51Z

Changes: - added config for NEW_CTX_SWITCH - used new context on c906 sched switch routine - update _rt_hw_stack_init to fit into NEW_CTX_SWITCH - separated vector ctx from the generic Signed-off-by: Shell