<feed xmlns='http://www.w3.org/2005/Atom'>
<title>rt-thread.git/libcpu/risc-v/t-head, branch copilot/clean-up-finsh-function-code</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/rt-thread.git/atom/libcpu/risc-v/t-head?h=copilot%2Fclean-up-finsh-function-code</id>
<link rel='self' href='http://cgit.235523.xyz/rt-thread.git/atom/libcpu/risc-v/t-head?h=copilot%2Fclean-up-finsh-function-code'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/'/>
<updated>2025-11-16T03:40:53Z</updated>
<entry>
<title>Reorganize Group names in build system for clarity and IDE integration #10923</title>
<updated>2025-11-16T03:40:53Z</updated>
<author>
<name>Copilot</name>
<email>198982749+Copilot@users.noreply.github.com</email>
</author>
<published>2025-11-16T03:40:53Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=30e1e5e9dcdaff17258edf70b9f9783e08356288'/>
<id>urn:sha1:30e1e5e9dcdaff17258edf70b9f9783e08356288</id>
<content type='text'>
</content>
</entry>
<entry>
<title>给vector模块添加构建脚本</title>
<updated>2024-11-27T10:04:59Z</updated>
<author>
<name>heyuanjie87</name>
<email>943313837@qq.com</email>
</author>
<published>2024-11-22T03:58:18Z</published>
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<id>urn:sha1:d3820ed77e26759c3a3d29dad65bbcca371374c6</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[kernel] Specification interrupt nested level variable declaration type (#9568)</title>
<updated>2024-10-23T21:08:29Z</updated>
<author>
<name>Yuqiang Wang</name>
<email>yifang.wangyq@foxmail.com</email>
</author>
<published>2024-10-23T21:08:29Z</published>
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<id>urn:sha1:b3d59050b049f03d954273e8921f941dd806360a</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu]添加对riscv vector的支持 (#9531)</title>
<updated>2024-10-16T06:10:09Z</updated>
<author>
<name>heyuanjie87</name>
<email>943313837@qq.com</email>
</author>
<published>2024-10-16T06:10:09Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=49b661476393bd9c9fc199362cf4b008c35a9340'/>
<id>urn:sha1:49b661476393bd9c9fc199362cf4b008c35a9340</id>
<content type='text'>
[libcpu]添加对riscv vector的支持</content>
</entry>
<entry>
<title>删除多余空格</title>
<updated>2024-09-23T04:57:53Z</updated>
<author>
<name>heyuanjie87</name>
<email>943313837@qq.com</email>
</author>
<published>2024-09-20T02:43:13Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=8a53e6d63947a0ee0c60da53d322c75e0f5048cc'/>
<id>urn:sha1:8a53e6d63947a0ee0c60da53d322c75e0f5048cc</id>
<content type='text'>
</content>
</entry>
<entry>
<title>[libcpu]rv添加c908 cpu</title>
<updated>2024-09-23T04:57:53Z</updated>
<author>
<name>heyuanjie87</name>
<email>943313837@qq.com</email>
</author>
<published>2024-09-20T02:17:34Z</published>
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<id>urn:sha1:af5ca55736c8b4fa9538469afcaddd3453ead8b9</id>
<content type='text'>
</content>
</entry>
<entry>
<title>feat: remove redundant codes under virt64, c906</title>
<updated>2024-09-13T21:35:00Z</updated>
<author>
<name>Shell</name>
<email>smokewood@qq.com</email>
</author>
<published>2024-09-12T03:14:12Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=57d002b25e26a5df950b087f0ea2dc7b6feeb7e3'/>
<id>urn:sha1:57d002b25e26a5df950b087f0ea2dc7b6feeb7e3</id>
<content type='text'>
Changes:

- create new folder name `common64` and save all common codes of rv64
  inside

Signed-off-by: Shell &lt;smokewood@qq.com&gt;
</content>
</entry>
<entry>
<title>feat: libcpu/risc-v: unify low-level bringups</title>
<updated>2024-09-11T22:06:51Z</updated>
<author>
<name>Shell</name>
<email>smokewood@qq.com</email>
</author>
<published>2024-09-02T10:03:21Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=c78a19ed264adf9a5f90180148d3d7cf441f95b1'/>
<id>urn:sha1:c78a19ed264adf9a5f90180148d3d7cf441f95b1</id>
<content type='text'>
This patch consolidates the separated architecture-specific code for
rv64 (virt64 and c906) under a more unified approach. The changes
aim to enhance maintainability and code reuse, reducing duplication
between these two architectures while adding small improvements in
porting compatibility.

Changes:
- Modified build scripts (SConscript) for both virt64 and c906 to
  remove ASID and vector dependencies when not required.
- Updated c906's sbi.c and sbi.h to use standard integer types
  (uint32_t) and include the missing &lt;stdint.h&gt; header.
- Unified inline function declaration for `sbi_call` across both
  c906 and virt64 using `rt_inline`.
- Disabled FPU and vector in c906's startup assembly file, aligning it
  with the virt64 handling.
- Corrected syscall handler type definitions in c906 for consistency.

Signed-off-by: Shell &lt;smokewood@qq.com&gt;
</content>
</entry>
<entry>
<title>feat: libcpu/risc-v: unify interrupt &amp; IO on rv64</title>
<updated>2024-09-11T22:06:51Z</updated>
<author>
<name>Shell</name>
<email>smokewood@qq.com</email>
</author>
<published>2024-09-02T10:02:15Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=e244c196c4f1f5a867891df303476947a7769876'/>
<id>urn:sha1:e244c196c4f1f5a867891df303476947a7769876</id>
<content type='text'>
This patch aims to unify the two currently separated RISC-V 64-bit
architecture ports, 'virt64' and 'c906', into a single generic
'common64' port. The changes include renaming files and updating
includes to use a unified 'interrupt.h' header, as well as making
adjustments to IO and trap handling to be more consistent between the
two architectures.

Changes:
- Renamed 'rt_interrupt.h' to 'interrupt.h' and updated includes accordingly.
- Unified IO register access functions in 'riscv_io.h'.
- Added 'opcode.h' for portable assembly support.
- Updated 'plic.c' and 'plic.h' to handle interrupts in a unified manner.
- Modified 'trap.c' to handle exceptions and interrupts consistently for 'rv64'.

Signed-off-by: Shell &lt;smokewood@qq.com&gt;
</content>
</entry>
<entry>
<title>feat: libcpu/risc-v: unify mmu related works</title>
<updated>2024-09-11T22:06:51Z</updated>
<author>
<name>Shell</name>
<email>smokewood@qq.com</email>
</author>
<published>2024-09-02T09:58:56Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/rt-thread.git/commit/?id=a00aaab2bac3b44baa55f5f25fe08b2d10c27c9b'/>
<id>urn:sha1:a00aaab2bac3b44baa55f5f25fe08b2d10c27c9b</id>
<content type='text'>
These changes are designed to standardize the memory management across
'virt64' and 'c906', ensuring efficient handling of address spaces and
page tables.

Changes:
- Creation of ASID management files (`asid.c`) for both 'c906' and
  'virt64' architectures, which is essential for maintaining stability.
- Extensive updates to the MMU configuration and handling in `mmu.c` and `mmu.h` files.
- Addition of functions to manage ASID allocation and switching of page tables.
- For c906, accommodated the early memory setup to the one from virt64.

Signed-off-by: Shell &lt;smokewood@qq.com&gt;
</content>
</entry>
</feed>
